David Smeets, Josef Fazekas Quantifying charging damage in gate oxides of antenna structures for WLR monitoring. [Citation Graph (0, 0)][DBLP] Microelectronics Reliability, 2004, v:44, n:8, pp:1245-1250 [Journal]
Werner Muth, Wolfgang Walter Bias temperature instability assessment of n- and p-channel MOS transistors using a polysilicon resistive heated scribe lane test structure. [Citation Graph (0, 0)][DBLP] Microelectronics Reliability, 2004, v:44, n:8, pp:1251-1262 [Journal]
Mile K. Stojcev Reliability of Computer Systems and Networks: Fault Tolerance, Analysis and Design; Martin L. Shooman. John Wiley and Sons Inc., New York; 2002. Hardcover, pp 528, plus XXII. [Citation Graph (0, 0)][DBLP] Microelectronics Reliability, 2004, v:44, n:8, pp:1275-1276 [Journal]
Mile K. Stojcev Power Distribution Networks in High Speed Integrated Circuits; Andrey Mezhiba, Eby Friedman. Kluwer Academic Publishers, Boston; 2004. Hardcover, 280pp, plus XXIII, ISBN 1-4020-7534-0. [Citation Graph (0, 0)][DBLP] Microelectronics Reliability, 2004, v:44, n:8, pp:1277-1278 [Journal]
Mile K. Stojcev Digital design and computer architecture; Hassan A. Farhat. CRC Press, Boca Raton: 2004. Hardcover, 487pp, plus XXII. ISBN 0-8493-1191-8. [Citation Graph (0, 0)][DBLP] Microelectronics Reliability, 2004, v:44, n:8, pp:1279-1280 [Journal]
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