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Journals in DBLP

Microelectronics Reliability
2005, volume: 45, number: 9-11

  1. N. Labat
    Editorial. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1275-1276 [Journal]
  2. Etienne Sicard, J. M. Dienot
    Issues in electromagnetic compatibility of integrated circuits: emission and susceptibility. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1277-1284 [Journal]
  3. A. London
    Basic Principles for Managing Foundry Programs. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1285-1292 [Journal]
  4. Mauro Ciappa
    Lifetime prediction on the base of mission profiles. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1293-1298 [Journal]
  5. Y.-L. Li, Zs. Tökei, Ph. Roussel, Guido Groeseneken, Karen Maex
    Layout dependency induced deviation from Poisson area scaling in BEOL dielectric reliability. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1299-1304 [Journal]
  6. Changsoo Hong, Linda S. Milor, Munkang Choi, Tom Lin
    Study of Area Scaling Effect on Integrated Circuit Reliability Based on Yield Models. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1305-1310 [Journal]
  7. Shih-Hung Chen, Ming-Dou Ker
    Investigation on seal-ring rules for IC product reliability in 0.25-mum CMOS technology. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1311-1316 [Journal]
  8. J. Y. Seo, K. J. Lee, Y. S. Kim, S. Y. Lee, S. J. Hwang, C. K. Yoon
    Reliability for Recessed Channel Structure n-MOSFET. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1317-1320 [Journal]
  9. G. Cassanelli, G. Mura, F. Cesaretti, Massimo Vanzi, Fausto Fantini
    Reliability predictions in electronic industrial applications. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1321-1326 [Journal]
  10. A. Kerlain, V. Mosser
    Robust, versatile, direct low-frequency noise characterization method for material/process quality control using cross-shaped 4-terminal devices. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1327-1330 [Journal]
  11. Ling-Chang Hu, An-Chi Kang, Eric Chen, J. R. Shih, Yao-Feng Lin, Kenneth Wu, Ya-Chin King
    Gate stress effect on low temperature data retention characteristics of split-gate flash memories. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1331-1336 [Journal]
  12. G. Ghidini, C. Capolupo, G. Giusto, A. Sebastiani, B. Stragliati, M. Vitali
    Tunnel oxide degradation under pulsed stress. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1337-1342 [Journal]
  13. Ninoslav Stojadinovic, D. Dankovic, S. Djoric-Veljkovic, V. Davidovic, I. Manic, S. Golubovic
    Negative bias temperature instability mechanisms in p-channel power VDMOSFETs. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1343-1348 [Journal]
  14. Yannick Rey-Tauriac, J. Badoc, B. Reynard, R. A. Bianchi, D. Lachenal, A. Bravaix
    Hot-carrier reliability of 20V MOS transistors in 0.13 mum CMOS technology. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1349-1354 [Journal]
  15. M. Nelhiebel, J. Wissenwasser, Th. Detzel, A. Timmerer, E. Bertagnolli
    Hydrogen-related influence of the metallization stack on characteristics and reliability of a trench gate oxide. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1355-1359 [Journal]
  16. J. Y. Seo, K. J. Lee, S. Y. Lee, S. J. Hwang, C. K. Yoon
    Dielectric reliability of stacked Al2O3-HfO2 MIS capacitors with cylinder type for improving DRAM data retention characteristics. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1360-1364 [Journal]
  17. E. Miranda, J. Molina, Y. Kim, H. Iwai
    Degradation of high-K LA2O3 gate dielectrics using progressive electrical stress. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1365-1369 [Journal]
  18. A. Bravaix, D. Goguenheim, M. Denais, V. Huard, C. R. Parthasarathy, F. Perrier, N. Revil, E. Vincent
    Impacts of the recovery phenomena on the worst-case of damage in DC/AC stressed ultra-thin NO gate-oxide MOSFETs. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1370-1375 [Journal]
  19. K. Hayama, K. Takakura, H. Ohyama, S. Kuboyama, S. Matsuda, J. M. Rafí, A. Mercha, E. Simoen, C. Claeys
    Radiation source dependence of performance degradation in thin gate oxide fully-depleted SOI n-MOSFETs. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1376-1381 [Journal]
  20. Enjun Xiao, P. P. Ghosh, C. Yu, J. S. Yuan
    Hot carrier and soft breakdown effects on LNA performance for ultra wideband communications. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1382-1385 [Journal]
  21. M. A. Exarchos, G. J. Papaioannou, J. Jomaah, F. Balestra
    The impact of static and dynamic degradation on SOI "smart-cut" floating body MOSFETs. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1386-1389 [Journal]
  22. L. Aguilera, M. Porti, M. Nafría, X. Aymerich
    Pre- and post-BD electrical conduction of stressed HfO2/SiO2 MOS gate stacks observed at the nanoscale. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1390-1393 [Journal]
  23. Jin-Wook Lee, Gyoung Ho Buh, Guk-Hyon Yon, Tai-su Park, Yu Gyun Shin, U-In Chung, Joo Tae Moon
    Elimination of surface state induced edge transistors in high voltage NMOSFETs for flash memory devices. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1394-1397 [Journal]
  24. Jae-Seong Jeong, Jae-Hyun Lee, Jong-Shin Ha, Sang-Deuk Park
    Stress Mechanism about Field Lightning Surge of High Voltage BJT Based Line Driver for ADSL System. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1398-1401 [Journal]
  25. Chuanzhao Yu, Enjun Xiao, J. S. Yuan
    Voltage stress-induced hot carrier effects on SiGe HBT VCO. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1402-1405 [Journal]
  26. G. Boselli, C. Duvvury
    Trends and challenges to ESD and Latch-up designs for nanometer CMOS technologies. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1406-1414 [Journal]
  27. N. Guitard, F. Essely, D. Trémouilles, M. Bafleur, N. Nolhier, Philippe Perdu, A. Touboul, V. Pouget, D. Lewis
    Different Failure signatures of multiple TLP and HBM Stresses in an ESD robust protection structure. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1415-1420 [Journal]
  28. Heinrich Wolf, Horst A. Gieser, Wolfgang Soldner, Harald Gossner
    A Dedicated TLP Set-Up to Investigate the ESD Robustness of RF Elements and Circuits. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1421-1424 [Journal]
  29. M. S. B. Sowariraj, Theo Smedes, Peter C. de Jong, Cora Salm, Ton J. Mouthaan, Fred G. Kuper
    A 3-D Circuit Model to evaluate CDM performance of ICs. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1425-1429 [Journal]
  30. Vesselin K. Vassilev, V. A. Vashchenko, Ph. Jansen, Guido Groeseneken, M. ter Beek
    ESD circuit model based protection network optimisation for extended-voltage NMOS drivers. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1430-1435 [Journal]
  31. Zs. Tökei, Y.-L. Li, G. P. Beyer
    Reliability challenges for copper low-k dielectrics and copper diffusion barriers. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1436-1442 [Journal]
  32. Arijit Roy, Cher Ming Tan, Rakesh Kumar, Xian Tong Chen
    Effect of test condition and stress free temperature on the electromigration failure of Cu dual damascene submicron interconnect line-via test structures. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1443-1448 [Journal]
  33. Cher Ming Tan, Arijit Roy, Kok Tong Tan, Derek Sim Kwang Ye, Frankie Low
    Effect of vacuum break after the barrier layer deposition on the electromigration performance of aluminum based line interconnects. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1449-1454 [Journal]
  34. Jong Hun Kim, Kyosun Kim, Seok Hee Jeon, Jong-Tae Park
    Reliability improvement by the suppression of keyhole generation in W-plug vias. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1455-1458 [Journal]
  35. Kevin Sanchez, Romain Desplats, Felix Beaudoin, Philippe Perdu, J. P. Roux, G. Woods, D. Lewis
    NIR laser stimulation for dynamic timing analysis. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1459-1464 [Journal]
  36. Abdellatif Firiti, Felix Beaudoin, G. Haller, Philippe Perdu, D. Lewis, P. Fouillat
    Impact of semiconductors material on IR Laser Stimulation signal. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1465-1470 [Journal]
  37. Stas Polonsky, M. Bhushan, A. Gattiker, Alan J. Weger, Peilin Song
    Photon emission microscopy of inter/intra chip device performance variations. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1471-1475 [Journal]
  38. M. Remmach, A. Pigozzi, Romain Desplats, Philippe Perdu, D. Lewis, J. Noel, S. Dudit
    Light Emission to Time Resolved Emission For IC Debug and Failure Analysis. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1476-1481 [Journal]
  39. Stéphane Grauby, M. Amine Salhi, Wilfrid Claeys, D. Trias, Stefan Dilhaire
    ElectroStatic Discharge Fault Localization by Laser Probing. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1482-1486 [Journal]
  40. Sanjib Kumar Brahma, Christian Boit, Arkadiusz Glowacki
    Seebeck Effect Detection on Biased Device without OBIRCH Distortion Using FET Readout. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1487-1492 [Journal]
  41. Alberto Tosi, Franco Stellari, F. Zappa
    Innovative packaging technique for backside optical testing of wire-bonded chips. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1493-1498 [Journal]
  42. Marco Buzzo, Mauro Ciappa, Maria Stangoni, Wolfgang Fichtner
    Two-dimensional Dopant Profiling and Imaging of 4H Silicon Carbide Devices by Secondary Electron Potential Contrast. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1499-1504 [Journal]
  43. C. Hartmann, W. Mertin, G. Bacher
    Circuit-internal signal measurements with a needle sensor. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1505-1508 [Journal]
  44. M. Grützner
    Advanced electrical analysis of embedded memory cells using atomic force probing. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1509-1513 [Journal]
  45. C. De Nardi, Romain Desplats, Philippe Perdu, Felix Beaudoin, J.-L. Gauffier
    Oxide charge measurements in EEPROM devices. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1514-1519 [Journal]
  46. G. Neumann, J. Touzel, R. Duschl
    Localization and physical analysis of dielectric weaknesses for state-of-the-art deep trench based DRAM products. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1520-1525 [Journal]
  47. M.-A. Iannello, L. Tsung
    STEM role in failure analysis. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1526-1531 [Journal]
  48. Maria Stangoni, Mauro Ciappa, Wolfgang Fichtner
    Assessment of the Analytical Capabilities of Scanning Capacitance and Scanning Spreading Resistance Microscopy Applied to Semiconductor Devices. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1532-1537 [Journal]
  49. Felix Beaudoin, Kevin Sanchez, Romain Desplats, Philippe Perdu, J. M. Nicot, J. P. Roux, M. Otte
    Dynamic Laser Stimulation Case Studies. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1538-1543 [Journal]
  50. Rudolf Schlangen, Uwe Kerst, A. Kabakow, Christian Boit
    Electrical Performance Evaluation of FIB Edited Circuits through Chip Backside Exposing Shallow Trench Isolations. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1544-1549 [Journal]
  51. Franco Stellari, Peilin Song, John Hryckowian, Otto A. Torreiter, Steve Wilson, Phil Wu, Alberto Tosi
    Characterization of a 0.13 mum CMOS Link Chip using Time Resolved Emission (TRE). [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1550-1553 [Journal]
  52. J. Y. Liao, G. L. Woods, X. Chen, H. L. Marks
    Localization of Marginal Circuits for Yield Diagnostics Utilizing a Dynamic Laser Stimulation Probing System. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1554-1557 [Journal]
  53. U. Muehle, A. Lenk, R. Weiland, H. Lichte
    Characterisation of dopants distribution using electron holography and FIB-based lift-off preparation. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1558-1561 [Journal]
  54. F. Sibileau, C. Ali, C. Giret, D. Faure
    SRAM cell defect isolation methodology by sub micron probing technique. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1562-1567 [Journal]
  55. Peter Breitschopf, Guenther Benstetter, Bernhard Knoll, Werner Frammelsberger
    Intermittent contact scanning capacitance microscopy-An improved method for 2D doping profiling. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1568-1571 [Journal]
  56. Cher Ming Tan, Kim Peng Lim, Tai Chong Chai, Guat Cheng Lim
    Non-destructive identification of open circuit in wiring on organic substrate with high wiring density covered with solder resist. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1572-1575 [Journal]
  57. S. Barberan, E. Auvray
    Die repackaging for failure analysis. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1576-1580 [Journal]
  58. Ruggero Pintus, Simona Podda, Massimo Vanzi
    Image alignment for 3D reconstruction in a SEM. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1581-1584 [Journal]
  59. G. Verzellesi, Gaudenzio Meneghesso, A. Chini, Enrico Zanoni, C. Canali
    DC-to-RF dispersion effects in GaAs- and GaN-based heterostructure FETs: performance and reliability issues. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1585-1592 [Journal]
  60. S. Huyghe, L. Béchou, N. Zerounian, Y. Deshayes, F. Aniel, A. Denolle, D. Laffitte, J. L. Goudard, Y. Danto
    Electroluminescence spectroscopy for reliability investigations of 1.55 mum bulk semiconductor optical amplifier. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1593-1599 [Journal]
  61. Cezary Sydlo, J. Sigmund, Bastian Mottet, Hans L. Hartnagel
    Reliability investigations on LTG-GaAs photomixers for THz generation based on optical heterodyning. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1600-1604 [Journal]
  62. P. Cova, N. Delmonte, Roberto Menozzi
    On state breakdown in PHEMTs and its temperature dependence. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1605-1610 [Journal]
  63. N. Ismail, N. Malbert, N. Labat, A. Touboul, J. L. Muraro, F. Brasseau, D. Langrez
    Safe operating area of GaAs MESFET and PHEMT for amplification in overdrive operating conditions. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1611-1616 [Journal]
  64. A. Sozza, C. Dua, E. Morvan, B. Grimber, S. L. Delage
    A 3000 hours DC Life Test on AlGaN/GaN HEMT for RF and microwave applications. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1617-1621 [Journal]
  65. O. Pajona, C. Aupetit-Berthelemot, R. Lefevre, J. M. Dumas
    Performances and limitations analyses of PHEMT and MHEMT for applications in high bit rate fiber-optic systems. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1622-1625 [Journal]
  66. H. A. Post, P. Letullier, T. Briolat, R. Humke, R. Schuhmann, K. Saarinen, W. Werner, Y. Ousten, G. Lekens, A. Dehbi
    Failure mechanisms and qualification testing of passive components. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1626-1632 [Journal]
  67. W. D. van Driel, M. A. J. van Gils, R. B. R. van Silfhout, G. Q. Zhang
    Prediction of Delamination Related IC & Packaging Reliability Problems. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1633-1638 [Journal]
  68. D. Abessolo-Bidzo, P. Poirier, Ph. Descamps, B. Domengès
    Isolating failing sites in IC packages using time domain reflectometry: Case studies. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1639-1644 [Journal]
  69. Isaline Richard, Romain Fayolle, Jean-Claude Lecomte
    New experimental approach for failure prediction in electronics: Topography and deformation measurement complemented with acoustic microscopy. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1645-1651 [Journal]
  70. A. Guédon-Gracia, E. Woirgard, C. Zardini
    Correlation between Experimental Results and FE Simulations to Evaluate Lead-Free BGA Assembly Reliability. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1652-1657 [Journal]
  71. A. Dehbi, Y. Ousten, Y. Danto, W. Wondrak
    Vibration lifetime modelling of PCB assemblies using steinberg model. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1658-1661 [Journal]
  72. Kirsten Weide-Zaage, Walter Horaud, Hélène Frémont
    Moisture diffusion in Printed Circuit Boards: Measurements and Finite- Element- Simulations. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1662-1667 [Journal]
  73. K. C. Lee, A. Vythilingam, P. Alpern
    A simple moisture diffusion model for the prediction of optimal baking schedules for plastic SMD packages. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1668-1671 [Journal]
  74. T. Braun, K.-F. Becker, M. Koch, V. Bader, Rolf Aschenbrenner, Herbert Reichl
    Reliability Potential Of Epoxy Based Encapsulants For Automotive Applications. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1672-1675 [Journal]
  75. J. Vobecký, D. Kolesnikov
    Reliability of Contacts for Press-Pack High-Power Devices. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1676-1681 [Journal]
  76. Masanori Usui, Masayasu Ishiko, Koji Hotta, Satoshi Kuwano, Masato Hashimoto
    Effects of uni-axial mechanical stress on IGBT characteristics. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1682-1687 [Journal]
  77. M. Heer, V. Dubec, M. Blaho, Scrgey Bychikhin, Dionyz Pogany, E. Gornik, M. Denison, M. Stecher, G. Groos
    Automated setup for thermal imaging and electrical degradation study of power DMOS devices. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1688-1693 [Journal]
  78. Mauro Ciappa, Wolfgang Fichtner, T. Kojima, Y. Yamada, Y. Nishibe
    Extraction of Accurate Thermal Compact Models for Fast Electro-Thermal Simulation of IGBT Modules in Hybrid Electric Vehicles. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1694-1699 [Journal]
  79. S. Azzopardi, A. Benmansour, M. Ishiko, E. Woirgard
    Assessment of the Trench IGBT reliability: low temperature experimental characterization. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1700-1705 [Journal]
  80. A. Irace, G. Breglio, P. Spirito, Romeo Letor, Sebastiano Russo
    Reliability enhancement with the aid of transient infrared thermal analysis of smart Power MOSFETs during short circuit operation. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1706-1710 [Journal]
  81. G. Busatto, A. Porzio, F. Velardi, F. Iannuzzo, A. Sanseverino, G. Currò
    Experimental and Numerical investigation about SEB/SEGR of Power MOSFET. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1711-1716 [Journal]
  82. B. Khong, P. Tounsi, Ph. Dupuy, X. Chauffleur, M. Legros, A. Deram, C. Levade, G. Vanderschaeve, J. M. Dorkel, J. P. Fradin
    Innovative Methodology for Predictive Reliability of Intelligent Power Devices Using Extreme Electro-thermal Fatigue. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1717-1722 [Journal]
  83. Cher Ming Tan, Joe Chiu, Robert Liu, Guan Zhang
    Reliability screening through electrical testing for press-fit alternator power diode in automotive application. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1723-1727 [Journal]
  84. C. O. Maïga, Hamid Toutah, Boubekeur Tala-Ighil, B. Boudart
    Trench insulated gate bipolar transistors submitted to high temperature bias stress. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1728-1731 [Journal]
  85. M. A. Belaïd, K. Ketata, K. Mourgues, H. Maanane, M. Masmoudi, J. Marcon
    Comparative analysis of accelerated ageing effects on power RF LDMOS reliability. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1732-1737 [Journal]
  86. Francesco Iannuzzo
    Non-destructive Testing Technique for MOSFET's Characterisation during Soft-Switching ZVS Operations. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1738-1741 [Journal]
  87. A. Tazzoli, Gaudenzio Meneghesso, Enrico Zanoni
    A novel fast and versatile temperature measurement system for LDMOS transistors. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1742-1745 [Journal]
  88. W. Lajnef, J.-M. Vinassa, O. Briat, E. Woirgard
    Specification and use of pulsed current profiles for ultracapacitors power cycling. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1746-1749 [Journal]
  89. Jeremy A. Walraven
    Failure Analysis Issues in Microelectromechanical Systems (MEMS). [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1750-1757 [Journal]
  90. F. Cacchione, A. Corigliano, B. De Masi, C. Riva
    Out of plane vs in plane flexural behaviour of thin polysilicon films: Mechanical characterization and application of the Weibull approach. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1758-1763 [Journal]
  91. D. Veyrié, D. Lellouchi, J.-L. Roux, F. Pressecq, A. Tetelin, C. Pellet
    FTIR spectroscopy for the hermeticity assessment of micro-cavities. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1764-1769 [Journal]
  92. S. Mellé, D. De Conto, L. Mazenq, D. Dubuc, B. Poussard, C. Bordas, K. Grenier, L. Bary, O. Vendier, J. L. Muraro
    Failure predictive model of capacitive RF-MEMS. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1770-1775 [Journal]
  93. K. Yacine, F. Flourens, D. Bourrier, L. Salvagnac, P. Calmont, X. Lafontan, Q.-H. Duong, L. Bucaillot, D. Peyrou, P. Pons
    Biaxial initial stress characterization of bilayer gold RF-switches. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1776-1781 [Journal]
  94. M. Exarchos, V. Theonas, P. Pons, G. J. Papaioannou, S. Mellé, D. Dubuc, F. Cocetti, R. Plana
    Investigation of charging mechanisms in metal-insulator-metal structures. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1782-1785 [Journal]
  95. D. Briand, Felix Beaudoin, J. Courbat, N. F. de Rooij, Romain Desplats, Philippe Perdu
    Failure analysis of micro-heating elements suspended on thin membranes. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1786-1789 [Journal]
  96. Q.-H. Duong, L. Buchaillot, D. Collard, P. Schmitt, X. Lafontan, P. Pons, F. Flourens, F. Pressecq
    Thermal and electrostatic reliability characterization in RF MEMS switches. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1790-1793 [Journal]
  97. Chuanzhao Yu, J. S. Yuan, Anwar Sadat
    Dynamic stress-induced high-frequency noise degradations in nMOSFETs. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1794-1799 [Journal]
  98. P. Benoit, J. Raoult, C. Delseny, F. Pascal, L. Snadny, J. C. Vildeuil, M. Marin, B. Martinet, D. Cottin, O. Noblanc
    Dc and low frequency noise analysis of hot-carrier induced degradation of low complexity 0.13 mum CMOS bipolar transistors. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2005, v:45, n:9-11, pp:1800-1806 [Journal]
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