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Journals in DBLP

ACM Trans. Design Autom. Electr. Syst.
2007, volume: 12, number: 4

  1. Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang
    Temporal floorplanning using the three-dimensional transitive closure subGraph. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:4, pp:- [Journal]
  2. Qubo Hu, Per Gunnar Kjeldsberg, Arnout Vandecappelle, Martin Palkovic, Francky Catthoor
    Incremental hierarchical memory size estimation for steering of loop transformations. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:4, pp:- [Journal]
  3. Gang Chen, Xiaoyu Song, Feng Liu, QingPing Tan, Fei He
    A note on "a mapping algorithm for computer-assisted exploration in the design of embedded systems". [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:4, pp:- [Journal]
  4. Yi-Ping You, Chung-Wen Huang, Jenq Kuen Lee
    Compilation for compact power-gating controls. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:4, pp:- [Journal]
  5. Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou
    Ultra-fast and efficient algorithm for energy optimization by gradient-based stochastic voltage and task scheduling. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:4, pp:- [Journal]
  6. Shih-Hsu Huang, Yow-Tyng Nieh
    Clock skew scheduling with race conditions considered. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:4, pp:- [Journal]
  7. Yuki Kobayashi, Murali Jayapala, Praveen Raghavan, Francky Catthoor, Masaharu Imai
    Methodology for operation shuffling and L0 cluster generation for low energy heterogeneous VLIW processors. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:4, pp:- [Journal]
  8. Swaroop Ghosh, Swarup Bhunia, Kaushik Roy
    Low-Power and testable circuit synthesis using Shannon decomposition. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:4, pp:- [Journal]
  9. Dipankar Das, P. P. Chakrabarti, Rajeev Kumar
    Functional verification of task partitioning for multiprocessor embedded systems. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:4, pp:- [Journal]
  10. Jinfeng Liu, Pai H. Chou
    Idle energy minimization by mode sequence optimization. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:4, pp:- [Journal]
  11. Christopher Ostler, Karam S. Chatha, Vijay Ramamurthi, Krishnan Srinivasan
    ILP and heuristic techniques for system-level design on network processor architectures. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:4, pp:- [Journal]
  12. Peter Vanbroekhoven, Gerda Janssens, Maurice Bruynooghe, Francky Catthoor
    A practical dynamic single assignment transformation. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:4, pp:- [Journal]
  13. Sivaram Gopalakrishnan, Priyank Kalla
    Optimization of polynomial datapaths using finite ring algebra. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:4, pp:- [Journal]
  14. Gang Wang, Wenrui Gong, Brian DeRenzi, Ryan Kastner
    Exploring time/resource trade-offs by solving dual scheduling problems with the ant colony optimization. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:4, pp:- [Journal]
  15. Dmitri Maslov, Gerhard W. Dueck, D. Michael Miller
    Techniques for the synthesis of reversible Toffoli networks. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:4, pp:- [Journal]
  16. Youcef Bouchebaba, Bruno Girodias, Gabriela Nicolescu, El Mostapha Aboulhamid, Bruno Lavigueur, Pierre G. Paulin
    MPSoC memory optimization using program transformation. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:4, pp:- [Journal]
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