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Journals in DBLP

IEEE Trans. VLSI Syst.
1996, volume: 4, number: 3

  1. K. W. Hsu, Cherrice Traver
    Guest Editorial Introduction to the Special Issue on the 1995 IEEE ASIC Conference. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1996, v:4, n:3, pp:305- [Journal]
  2. Ming-Dou Ker, Chung-Yu Wu, Tao Cheng, Hun-Hsien Chang
    Capacitor-couple ESD protection circuit for deep-submicron low-voltage CMOS ASIC. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1996, v:4, n:3, pp:307-321 [Journal]
  3. Jan-Erik Eklund, C. Svensson, Anders Åström
    VLSI implementation of a focal plane image processor-a realization of the near-sensor image processing concept. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1996, v:4, n:3, pp:322-335 [Journal]
  4. C. A. Ryan, Joseph G. Tront
    FX: a fast approximate fault simulator for the switch-level using VHDL. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1996, v:4, n:3, pp:336-345 [Journal]
  5. Chanhee Oh, M. Ray Mercer
    Efficient logic-level timing analysis using constraint-guided critical path search. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1996, v:4, n:3, pp:346-355 [Journal]
  6. Tom Hameenanttila, Jo Dale Carothers, Donghui Li
    Fast coupled noise estimation for crosstalk avoidance in the MCG multichip module autorouter. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1996, v:4, n:3, pp:356-368 [Journal]
  7. Tan-Li Chou, Kaushik Roy
    Accurate power estimation of CMOS sequential circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1996, v:4, n:3, pp:369-380 [Journal]
  8. Patrick Lysaght, Jon Stockwood
    A simulation tool for dynamically reconfigurable field programmable gate arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1996, v:4, n:3, pp:381-390 [Journal]
  9. Ivan C. Kraljic, Georges Quénot, Bertrand Zavidovique
    From real-time emulation to ASIC integration for image processing applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1996, v:4, n:3, pp:391-404 [Journal]
  10. P. Plaza, L. A. Merayo, J. C. Diaz, J. L. Conesa
    A 2.5 Gb/s ATM switch chip set. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1996, v:4, n:3, pp:405-416 [Journal]
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