The SCEAS System
Navigation Menu

Journals in DBLP

IEEE Trans. VLSI Syst.
1999, volume: 7, number: 4

  1. Douglas M. Blough, Fadi J. Kurdahi, Seong Yong Ohm
    High-level synthesis of recoverable VLSI microarchitectures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:4, pp:401-410 [Journal]
  2. Min Xu, Fadi J. Kurdahi
    Accurate prediction of quality metrics for logic level designs targeted toward lookup-table-based FPGAs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:4, pp:411-418 [Journal]
  3. Smita Bakshi, Daniel D. Gajski
    Partitioning and pipelining for performance-constrained hardware/software systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:4, pp:419-432 [Journal]
  4. Sven Wuytack, Francky Catthoor, Gjalt G. de Jong, Hugo De Man
    Minimizing the required memory bandwidth in VLSI system realizations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:4, pp:433-441 [Journal]
  5. Yehea I. Ismail, Eby G. Friedman, José Luis Neves
    Figures of merit to characterize the importance of on-chip inductance. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:4, pp:442-449 [Journal]
  6. Keshab K. Parhi
    Low-energy CSMT carry generators and binary adders. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:4, pp:450-462 [Journal]
  7. Manish Goel, Naresh R. Shanbhag
    Dynamic algorithm transformations (DAT)-a systematic approach to low-power reconfigurable signal processing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:4, pp:463-476 [Journal]
  8. Chung-Sheng Li, Kumar N. Sivarajan, David G. Messerschmitt
    Statistical analysis of timing rules for high-speed synchronous VLSI systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:4, pp:477-482 [Journal]
  9. Kenneth Y. Yun, Ayoob E. Dooply
    Pausible clocking-based heterogeneous systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:4, pp:482-488 [Journal]
  10. Wen-Jong Fang, Allen C.-H. Wu, Duan-Ping Chen
    EmGen-a module generator for logic emulation applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:4, pp:488-492 [Journal]
  11. Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis
    Novel techniques for bus power consumption reduction in realizations of sum-of-product computation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:4, pp:492-497 [Journal]
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002