
Journals in DBLP
 A. Grzeszczak, Mrinal K. Mandal, Sethuraman Panchanathan
VLSI implementation of discrete wavelet transform. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 1996, v:4, n:4, pp:421433 [Journal]
 Srilata Raman, Lalit M. Patnaik
Performancedriven MCM partitioning through an adaptive genetic algorithm. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 1996, v:4, n:4, pp:434444 [Journal]
 R. Ramachandran, ShihLien Lu
Efficient arithmetic using selftiming. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 1996, v:4, n:4, pp:445454 [Journal]
 SangSoo Lee, C. A. Laber
A 3.5 in 230 Mbytes readchannel chip set for magnetooptical disk drives. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 1996, v:4, n:4, pp:455463 [Journal]
 Nader MirFakhraei
ATM switching architectures for waferscale integration. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 1996, v:4, n:4, pp:464471 [Journal]
 Mark B. Josephs, Jelio T. Yantchev
CMOS design of the tree arbiter element. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 1996, v:4, n:4, pp:472476 [Journal]
 Qingjian Yu, Ernest S. Kuh, Tianxiong Xue
Moment models of general transmission lines with application to interconnect analysis and optimization. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 1996, v:4, n:4, pp:477494 [Journal]
 ChiYing Tsui, José C. Monteiro, Massoud Pedram, Srinivas Devadas, Alvin M. Despain, Bill Lin
Correction to "Power Estimation Methods for Sequential Logic Circuits" [Correspondence]. [Citation Graph (0, 0)][DBLP] IEEE Trans. VLSI Syst., 1996, v:4, n:4, pp:495 [Journal]
