Journals in DBLP

IEEE Trans. VLSI Syst.
2002, volume: 10, number: 2

1. E. Macii, Ingrid Verbauwhede
   Guest editorial: low-power electronics and design. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2002, v:10, n:2, pp:69-70 [Journal]
   
2. Mohab Anis, Mohamed W. Allam, Mohamed I. Elmasry
   Energy-efficient noise-tolerant dynamic styles for scaled-down CMOS and MTCMOS technologies. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2002, v:10, n:2, pp:71-78 [Journal]
   
3. Supamas Sirichotiyakul, Tim Edwards, Chanhee Oh, Rajendran Panda, David Blaauw
   Duet: an accurate leakage estimation and optimization tool for dual-V_t circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2002, v:10, n:2, pp:79-90 [Journal]
   
4. Fatih Hamzaoglu, Yibin Ye, Ali Keshavarzi, Kevin Zhang, Siva Narendra, Shekhar Borkar, M. Stan, Vivek De
   Analysis of dual-V_T SRAM cells with full-swing single-ended bit line sensing for on-chip cache. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2002, v:10, n:2, pp:91-95 [Journal]
   
5. Luca Benini, Luca Macchiarulo, Alberto Macii, Massimo Poncino
   Layout-driven memory synthesis for embedded systems-on-chip. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2002, v:10, n:2, pp:96-105 [Journal]
   
6. Eike Schmidt, Gerd von Cölln, Lars Kruse, Frans Theeuwen, Wolfgang Nebel
   Memory power models for multilevel power estimation and optimization. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2002, v:10, n:2, pp:106-109 [Journal]
   
7. Wei-Chung Cheng, Massoud Pedram
   Power-optimal encoding for a DRAM address bus. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2002, v:10, n:2, pp:109-118 [Journal]
   
8. Yung-Hsiang Lu, Luca Benini, Giovanni De Micheli
   Power-aware operating systems for interactive systems. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2002, v:10, n:2, pp:119-134 [Journal]
   
9. Amit Sinha, Alice Wang, Anantha Chandrakasan
   Energy scalable system design. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2002, v:10, n:2, pp:135-145 [Journal]
   
10. Naehyuck Chang, Kwanho Kim, Hyung Gyu Lee
    Cycle-accurate energy measurement and characterization with a case study of the ARM7TDMI [microprocessors]. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2002, v:10, n:2, pp:146-154 [Journal]
    
11. Erik Lauwers, Georges G. E. Gielen
    Power estimation methods for analog circuits for architectural exploration of integrated systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2002, v:10, n:2, pp:155-162 [Journal]
    
12. Chih-Wen Lu, Chung-Len Lee
    A low-power high-speed class-AB buffer amplifier for flat-panel-display application. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2002, v:10, n:2, pp:163-168 [Journal]
    
13. Carl James Debono, Franco Maloberti, Joseph Micallef
    On the design of low-voltage, low-power CMOS analog multipliers for RF applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2002, v:10, n:2, pp:168-174 [Journal]
    
14. Dirk Stroobandt
    Guest editorial - system-level interconnect prediction. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2002, v:10, n:2, pp:175-176 [Journal]
    
15. Chung-Kuan Cheng, Andrew B. Kahng, Bao Liu, Dirk Stroobandt
    Toward better wireload models in the presence of obstacles. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2002, v:10, n:2, pp:177-189 [Journal]