Journals in DBLP

Computers & Electrical Engineering
2007, volume: 33, number: 4

1. Mohamed Abid
   Guest Editorial. [Citation Graph (0, 0)][DBLP]
   Computers & Electrical Engineering, 2007, v:33, n:4, pp:231-232 [Journal]
   
2. Stephen Coe, Shawki Areibi, Medhat Moussa
   A hardware Memetic accelerator for VLSI circuit partitioning. [Citation Graph (0, 0)][DBLP]
   Computers & Electrical Engineering, 2007, v:33, n:4, pp:233-248 [Journal]
   
3. N. Gorse, P. Bélanger, Alexandre Chureau, El Mostapha Aboulhamid, Yvon Savaria
   A high-level requirements engineering methodology for electronic system-level design. [Citation Graph (0, 0)][DBLP]
   Computers & Electrical Engineering, 2007, v:33, n:4, pp:249-268 [Journal]
   
4. Amir Masoud Gharehbaghi, Benyamin Hamdin Yaran, Shaahin Hessabi, Maziar Goudarzi
   An assertion-based verification methodology for system-level design. [Citation Graph (0, 0)][DBLP]
   Computers & Electrical Engineering, 2007, v:33, n:4, pp:269-284 [Journal]
   
5. Abdellatif Mtibaa, Bouraoui Ouni, Mohamed Abid
   An efficient list scheduling algorithm for time placement problem. [Citation Graph (0, 0)][DBLP]
   Computers & Electrical Engineering, 2007, v:33, n:4, pp:285-298 [Journal]
   
6. Hervé Charlery, Adrijean Andriahantenaina, Alain Greiner
   Physical design of the VCI wrappers for the on-chip packet-switched network named SPIN. [Citation Graph (0, 0)][DBLP]
   Computers & Electrical Engineering, 2007, v:33, n:4, pp:299-309 [Journal]
   
7. Thomas Hollstein, Manfred Glesner
   Advanced hardware/software co-design on reconfigurable network-on-chip based hyper-platforms. [Citation Graph (0, 0)][DBLP]
   Computers & Electrical Engineering, 2007, v:33, n:4, pp:310-319 [Journal]