Journals in DBLP
Xinjie Wei , Yici Cai , Meng Zhao , Xianlong Hong Legitimate Skew Clock Routing with Buffer Insertion. [Citation Graph (0, 0)][DBLP ] VLSI Signal Processing, 2006, v:42, n:2, pp:107-116 [Journal ] Kwok-Kwong Yiu , Man-Wai Mak , M. C. Cheung , Sun-Yuan Kung Blind Stochastic Feature Transformation for Channel Robust Speaker Verification. [Citation Graph (0, 0)][DBLP ] VLSI Signal Processing, 2006, v:42, n:2, pp:117-126 [Journal ] Tay-Jyi Lin , Hung-Yueh Lin , Chie-Min Chao , Chih-Wei Liu , Chih-Wei Jen A Compact DSP Core with Static Floating-Point Arithmetic. [Citation Graph (0, 0)][DBLP ] VLSI Signal Processing, 2006, v:42, n:2, pp:127-138 [Journal ] Ramy E. Aly , Magdy A. Bayoumi High-Speed and Low-Power IP for Embedded Block Coding with Optimized Truncation (EBCOT) Sub-Block in JPEG2000 System Implementation. [Citation Graph (0, 0)][DBLP ] VLSI Signal Processing, 2006, v:42, n:2, pp:139-148 [Journal ] Ghassem Jaberipur , Behrooz Parhami , Mohammad Ghodsi An Efficient Universal Addition Scheme for All Hybrid-Redundant Representations with Weighted Bit-Set Encoding. [Citation Graph (0, 0)][DBLP ] VLSI Signal Processing, 2006, v:42, n:2, pp:149-158 [Journal ] Chao Cheng , Keshab K. Parhi Hardware Efficient Fast Computation of the Discrete Fourier Transform. [Citation Graph (0, 0)][DBLP ] VLSI Signal Processing, 2006, v:42, n:2, pp:159-171 [Journal ] Fatma Sayadi , Emmanuel Casseau , Mohamed Atri , Mehrez Marzougui , Rached Tourki , Eric Martin G729 Voice Decoder Design. [Citation Graph (0, 0)][DBLP ] VLSI Signal Processing, 2006, v:42, n:2, pp:173-184 [Journal ] Yannick Le Moullec , Jean-Philippe Diguet , Nader Ben Amor , Thierry Gourdeaux , Jean Luc Philippe Algorithmic-level Specification and Characterization of Embedded Multimedia Applications with Design Trotter. [Citation Graph (0, 0)][DBLP ] VLSI Signal Processing, 2006, v:42, n:2, pp:185-208 [Journal ]