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Journals in DBLP

VLSI Signal Processing
2006, volume: 44, number: 1-2

  1. S. C. Chan, X. M. Xie
    Biorthogonal Recombination Nonuniform Cosine-Modulated Filter Banks and their Multiplier-Less Realizations. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:44, n:1-2, pp:5-23 [Journal]
  2. Lijun Gao, Keshab K. Parhi
    Models for Architectural Power and Power Grid Noise Analysis on Data Bus. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:44, n:1-2, pp:25-46 [Journal]
  3. Sangjin Hong, Shu-Shin Chin, Petar M. Djuric, Miodrag Bolic
    Design and Implementation of Flexible Resampling Mechanism for High-Speed Parallel Particle Filters. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:44, n:1-2, pp:47-62 [Journal]
  4. Ioannis Gasteratos, Antonios Gasteratos, Ioannis Andreadis
    An Algorithm for Adaptive Mean Filtering and Its Hardware Implementation. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:44, n:1-2, pp:63-78 [Journal]
  5. Tero Kangas, Timo D. Hämäläinen, Kimmo Kuusilinna
    Scalable Architecture for SoC Video Encoders. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:44, n:1-2, pp:79-95 [Journal]
  6. K. M. Tsui, S. C. Chan
    Error Analysis and Efficient Realization of the Multiplier-Less FFT-Like Transformation (ML-FFT) and Related Sinusoidal Transformations. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:44, n:1-2, pp:97-115 [Journal]
  7. Yung-Chi Chang, Chih-Wei Hsu, Wei-Min Chao, Liang-Gee Chen
    Interactive Content-aware Video Streaming System with Fine Granularity Scalability. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:44, n:1-2, pp:117-134 [Journal]
  8. Salvatore Carta, Danilo Pani, Luigi Raffo
    Reconfigurable Coprocessor for Multimedia Application Domain. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:44, n:1-2, pp:135-152 [Journal]
  9. Nikolas Kroupis, Nikolaos D. Zervas, Minas Dasygenis, Konstantinos Tatas, Antonios Argyriou, Dimitrios Soudris, Antonios Thanailakis
    Behavioral-Level Performance and Power Exploration of Data-Intensive Applications Mapped on Programmable Processors. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:44, n:1-2, pp:153-171 [Journal]
  10. Vince D. Calhoun, Tülay Adali
    Complex Infomax: Convergence and Approximation of Infomax with Complex Nonlinearities. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:44, n:1-2, pp:173-190 [Journal]
  11. Michael Hosemann, Gerhard Fettweis
    On enhancing SIMD-controlled DSPs for performing recursive filtering. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:44, n:1-2, pp:191- [Journal]
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