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Journals in DBLP

VLSI Signal Processing
2006, volume: 45, number: 3

  1. Konstantinos Sarrigeorgidis, Jan M. Rabaey
    A Scalable Configurable Architecture for Advanced Wireless Communication Algorithms. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:45, n:3, pp:127-151 [Journal]
  2. Sau-Gee Chen, Jen-Chuan Chih, Jun-Yi Chou
    Direct Digital Frequency Synthesis Based on a Two-Level Table-Lookup Scheme. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:45, n:3, pp:153-160 [Journal]
  3. Gustavo A. Ruiz, Juan A. Michell, Angel M. Buron
    High Throughput Parallel-Pipeline 2-D DCT/IDCT Processor Chip. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:45, n:3, pp:161-175 [Journal]
  4. Yuan Xie, Wei-Lun Hung
    Temperature-Aware Task Allocation and Scheduling for Embedded Multiprocessor Systems-on-Chip (MPSoC) Design. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:45, n:3, pp:177-189 [Journal]
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