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Journals in DBLP

VLSI Signal Processing
2007, volume: 47, number: 3

  1. Roman C. Kordasiewicz, Shahram Shirani
    On Hardware Implementations Of DCT and Quantization Blocks for H.264/AVC. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2007, v:47, n:3, pp:189-199 [Journal]
  2. Sze-Wei Lee, Soon-Chieh Lim
    An Enhanced Memory Address Mapping Scheme for Improved Memory Access Performance of 2-D DWT Processing Systems. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2007, v:47, n:3, pp:201-221 [Journal]
  3. Wei Han, Kwok-Wai Hon, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun
    A Speech Recognition IC Using Hidden Markov Models with Continuous Observation Densities. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2007, v:47, n:3, pp:223-232 [Journal]
  4. Jun-Hee Mun, Shung Han Cho, Sangjin Hong
    Flexible Controller Design and Its Application for Concurrent Execution of Buffer Centric Dataflows. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2007, v:47, n:3, pp:233-257 [Journal]
  5. Messaoud Ahmed-Ouameur, Daniel Massicotte
    Real-time DSP and FPGA Implementation of Wiener LMS Based Multipath Channel Estimation in 3G CDMA Systems. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2007, v:47, n:3, pp:259-279 [Journal]
  6. Yi-Hsuan Lee, Cheng Chen
    An Efficient Code Generation Algorithm for Non-orthogonal DSP Architecture. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2007, v:47, n:3, pp:281-296 [Journal]
  7. Mame Maria Mbaye, Normand Bélanger, Yvon Savaria, Samuel Pierre
    A Novel Application-specific Instruction-set Processor Design Approach for Video Processing Acceleration. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2007, v:47, n:3, pp:297-315 [Journal]
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