Journals in DBLP

Computer Architecture Letters
2007, volume: 6, number: 2

1. 
   Dynamic Predication of Indirect Jumps. [Citation Graph (, )][DBLP]
   
   
2. 
   Microarchitectures for Managing Chip Revenues under Process Variations. [Citation Graph (, )][DBLP]
   
   
3. 
   A Building Block for Coarse-Grain Optimizations in the On-Chip Memory Hierarchy. [Citation Graph (, )][DBLP]
   
   
4. 
   Flattened Butterfly Topology for On-Chip Networks. [Citation Graph (, )][DBLP]
   
   
5. 
   A Novel Parallel Deadlock Detection Algorithm and Hardware for Multiprocessor System-on-a-Chip. [Citation Graph (, )][DBLP]
   
   
6. 
   UNISIM: An Open Simulation Environment and Library for Complex Architecture Design and Collaborative Development. [Citation Graph (, )][DBLP]
   
   
7. 
   Branch Misprediction Prediction: Complementary Branch Predictors. [Citation Graph (, )][DBLP]
   
   
8. 
   Using Tag-Match Comparators for Detecting Soft Errors. [Citation Graph (, )][DBLP]