The SCEAS System
Navigation Menu
Introduction
Collection Based
Clustering
Ranking
Paper Based
Journals
Conferences
DB Status
Statistics
Search

Paper info

Grzegorz Pastuszak
Efficient Hardware Architecture for EBCOT in JPEG 2000 Using a Feedback Loop from the Rate Controller to the Bit-Plane Coder. [Citation Graph (0, 0)][DBLP]
ICIAP, 2005, pp:604-611 [Conf]

Scores and Rank
SCEAS: 0.41721
SCEAS_PS: 0
SCEAS_BPS: 0
SCEAS_EPS: 0
SCEAS_BEPS: 0
SCEAS_B0: 3.11202
PAGE_RANK: 0.48050
HITS_H: 0
HITS_A: 0
BHITS_H: 0
BHITS_A: 0
SALSA_A: 0
SALSA_H: 0
BSALSA_A: 0
BSALSA_H: 0
P: 0
BCC: 0
citations_to_me: 0
citations_from_me: 0



Graph produced by graphviz-1.8.5
Level:
Show on graph: DBLP citations: Citations Imported from Citeseer:
Level:
Show on graph: DBLP citations: Citations Imported from Citeseer:

NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
Introduction Collection Based Clustering Ranking Paper Based Journals Conferences DB Status Statistics Search
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002