The SCEAS System | ||||
Paper infoR. Raghavendra Kumar, Ricky Bedi, Ramadas Rajagopal, N. Guruprasad, K. Subbarangaiah, Taher Abbasi, D. V. R. Murthy, P. Krishna Prasad, D. R. GudeA Comprehensive SoC Design Methodology for Nanometer Design Challenges. [Citation Graph (0, 0)][DBLP] VLSI Design, 2006, pp:15-17 [Conf] Scores and Rank SCEAS: 0.41721 SCEAS_PS: 0 SCEAS_BPS: 0 SCEAS_EPS: 0 SCEAS_BEPS: 0 SCEAS_B0: 3.11202 PAGE_RANK: 0.48050 HITS_H: 0 HITS_A: 0 BHITS_H: 0 BHITS_A: 0 SALSA_A: 0 SALSA_H: 0 BSALSA_A: 0 BSALSA_H: 0 P: 0 BCC: 0 citations_to_me: 0 citations_from_me: 0 Graph produced by graphviz-1.8.5 | ||||
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