The SCEAS System | ||||
Paper infoM. Heer, V. Dubec, Scrgey Bychikhin, Dionyz Pogany, E. Gornik, M. Frank, A. Konrad, J. SchulzAnalysis of triggering behaviour of high voltage CMOS LDMOS clamps and SCRs during ESD induced latch-up. [Citation Graph (0, 0)][DBLP] Microelectronics Reliability, 2006, v:46, n:9-11, pp:1591-1596 [Journal] Scores and Rank SCEAS: 0.41721 SCEAS_PS: 0 SCEAS_BPS: 0 SCEAS_EPS: 0 SCEAS_BEPS: 0 SCEAS_B0: 3.11202 PAGE_RANK: 0.48050 HITS_H: 0 HITS_A: 0 BHITS_H: 0 BHITS_A: 0 SALSA_A: 0 SALSA_H: 0 BSALSA_A: 0 BSALSA_H: 0 P: 0 BCC: 0 citations_to_me: 0 citations_from_me: 0 Graph produced by graphviz-1.8.5 | ||||
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System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002 for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002 |