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Tadao Nakamura: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Tadao Nakamura
    Toward Architecting and Designing Novel Computers. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2003, pp:8-13 [Conf]
  2. Hiroshi Sasaki, Hitoshi Maruyama, Hideaki Tsukioka, Nobuyoshi Shoji, Hiroaki Kobayashi, Tadao Nakamura
    Reconfigurable synchronized dataflow processor. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2000, pp:27-28 [Conf]
  3. Kouji Takano, Takehito Sasaki, Nobuyuki Oba, Hiroaki Kobayashi, Tadao Nakamura
    Automated Design of Wave Pipelined Multiport Register Files. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1998, pp:197-202 [Conf]
  4. Yukinori Sato, Ken-ichi Suzuki, Tadao Nakamura
    An Operand Status Based Instruction Steering Scheme for Clustered Architectures. [Citation Graph (0, 0)][DBLP]
    CDES, 2005, pp:168-174 [Conf]
  5. Shintaro Momose, Kentaro Sano, K. Suzuki, Tadao Nakamura
    Parallel competitive learning algorithm for fast codebook design on partitioned space. [Citation Graph (0, 0)][DBLP]
    CLUSTER, 2004, pp:449-457 [Conf]
  6. Tadao Nakamura, Hiroaki Kobayashi, Jun Miyajima, Noboru Endo, Yoshiharu Shigei
    A Language Processor of an Intelligent Link System. [Citation Graph (0, 0)][DBLP]
    ICC (2), 1984, pp:527-530 [Conf]
  7. Kuninobu Tanno, Tadao Nakamura, Risaburo Sato
    An Analysis of the Receiving Behaviour of a Window Flow Control Mechanism in Packet Switching Networks. [Citation Graph (0, 0)][DBLP]
    ICC (3), 1984, pp:1331-1334 [Conf]
  8. Hiroaki Kobayashi, Ken-ichi Suzuki, Kentaro Sano, Yoshiyuki Kaeriyama, Yasumasa Saida, Nobuyuki Oba, Tadao Nakamura
    3DCGiRAM: An Intelligent Memory Architecture for Photo-Realistic Image Synthesis. [Citation Graph (0, 0)][DBLP]
    ICCD, 2001, pp:462-467 [Conf]
  9. Emad Rashid, Takashi Araki, Tadao Nakamura
    An Active Network for Improving Performance of Traffic Flow over Conventional ATM Service. [Citation Graph (0, 0)][DBLP]
    ICN (2), 2001, pp:620-627 [Conf]
  10. Masa-Aki Fukase, Tadao Nakamura
    Parallel Processing and Hardware Support of Symbols. [Citation Graph (0, 0)][DBLP]
    ICTAI, 1993, pp:450-451 [Conf]
  11. Nobuyuki Oba, Hiroaki Kobayashi, Tadao Nakamura
    An Adaptive Network Routing Method by Electrical-Circuit Modeling. [Citation Graph (0, 0)][DBLP]
    INFOCOM, 1993, pp:586-592 [Conf]
  12. Hiroaki Kobayashi, Hitoshi Yamauchi, Yuichiro Toh, Tadao Nakamura
    A Hierarchical Parallel Processing System for the Multipass-Rendering Method. [Citation Graph (0, 0)][DBLP]
    IPPS, 1996, pp:62-67 [Conf]
  13. Makoto Hasegawa, Tadao Nakamura, Yoshiharu Shigei
    Distributed Communicating Media-A Multitrack Bus-Capable of Concurrent Data Exchanging. [Citation Graph (0, 0)][DBLP]
    ISCA, 1981, pp:367-372 [Conf]
  14. Tomoyuki Nagase, Takashi Araki, Yoshio Yoshioka, Tadao Nakamura
    Moderating traffic flow over conventional ATM service. [Citation Graph (0, 0)][DBLP]
    ISCC, 2002, pp:659-663 [Conf]
  15. Emad Rashid, Yoshio Yoshioka, Takashi Araki, Tadao Nakamura
    Variable-Length Coding based on Bent Sequences for W.ireless Advertising. [Citation Graph (0, 0)][DBLP]
    ISCC, 2001, pp:568-572 [Conf]
  16. Kentaro Sano, Chiaki Takagi, Ryusuke Egawa, Ken-ichi Suzuki, Tadao Nakamura
    A Systolic Memory Architecture for Fast Codebook Design based on MMPDCL Algorithm. [Citation Graph (0, 0)][DBLP]
    ITCC (1), 2004, pp:572-578 [Conf]
  17. C. D. Lima, Kentaro Sano, Tadao Nakamura
    Hardware Support for Concurrent Execution of Loops Containing Loop-carried Data Dependences. [Citation Graph (0, 0)][DBLP]
    IASTED PDCS, 2002, pp:718-723 [Conf]
  18. Kentaro Sano, Shintaro Momose, Hiroyuki Takizawa, Taira Nakajima, C. D. Lima, Hiroaki Kobayashi, Tadao Nakamura
    Parallel Algorithm for the Law-of-the-Jungle Learning to the Fast Design of Optimal Codebooks. [Citation Graph (0, 0)][DBLP]
    IASTED PDCS, 2002, pp:578-582 [Conf]
  19. Jie Hu, Tadao Nakamura, Lei Li
    The Convergence of Asynchronous Monotone Newton Iterations on Distributed Computer. [Citation Graph (0, 0)][DBLP]
    PPSC, 1995, pp:106-107 [Conf]
  20. Masa-Aki Fukase, Ryusuke Egawa, Tomoaki Sato, Tadao Nakamura
    Scaling Up Of Wave Pipelines. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2001, pp:439-445 [Conf]
  21. Takeshi Miura, Kentaro Sano, Ken-ichi Suzuki, Tadao Nakamura
    A Competitive Learning Algorithm with Controlling Maximum Distortion. [Citation Graph (0, 0)][DBLP]
    JACIII, 2005, v:9, n:2, pp:166-174 [Journal]
  22. Tadao Nakamura
    Cool Chips III. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2000, v:20, n:6, pp:83-84 [Journal]
  23. Kentaro Sano, Yusuke Kobayashi, Tadao Nakamura
    Differential coding scheme for efficient parallel image composition on a PC cluster system. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 2004, v:30, n:2, pp:285-299 [Journal]
  24. Kentaro Sano, Shintaro Momose, Hiroyuki Takizawa, Hiroaki Kobayashi, Tadao Nakamura
    Efficient parallel processing of competitive learning algorithms. [Citation Graph (0, 0)][DBLP]
    Parallel Computing, 2004, v:30, n:12, pp:1361-1383 [Journal]
  25. Takuya Nakaike, Takehito Sasaki, Masayuki Katahira, Hiroaki Kobayashi, Tadao Nakamura
    A scheduling method for instruction-level parallel processing of vectorand scalar instructions. [Citation Graph (0, 0)][DBLP]
    Systems and Computers in Japan, 1999, v:30, n:13, pp:23-33 [Journal]
  26. Ken-ichi Suzuki, Nobuyuki Oba, Shigenori Shimizu, Hiroaki Kobayashi, Tadao Nakamura
    Time stamp invalidation of TLB-unified cache and its performance evaluation. [Citation Graph (0, 0)][DBLP]
    Systems and Computers in Japan, 1999, v:30, n:11, pp:94-106 [Journal]
  27. Masafumi Takahashi, Nobuyuki Oba, Hiroaki Kobayashi, Tadao Nakamura
    Decoupled modified-bit cache. [Citation Graph (0, 0)][DBLP]
    Systems and Computers in Japan, 1997, v:28, n:6, pp:49-59 [Journal]
  28. Hiroaki Kobayashi, Satoshi Nishimura, Hideyuki Kubota, Tadao Nakamura, Yoshiharu Shigei
    Load balancing strategies for a parallel ray-tracing system based on constant subdivision. [Citation Graph (0, 0)][DBLP]
    The Visual Computer, 1988, v:4, n:4, pp:197-209 [Journal]
  29. Hiroaki Kobayashi, Tadao Nakamura, Yoshiharu Shigei
    Parallel processing of an object space for image synthesis using ray tracing. [Citation Graph (0, 0)][DBLP]
    The Visual Computer, 1987, v:3, n:1, pp:13-22 [Journal]
  30. Yoshiyuki Kaeriyama, Daichi Zaitsu, Kazuhiko Komatsu, Ken-ichi Suzuki, Tadao Nakamura, Nobuyuki Ohba
    Ray Tracing Hardware System Using Plane-Sphere Intersections. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-6 [Conf]

  31. Cooperation of Neighboring PEs in Clustered Architectures. [Citation Graph (, )][DBLP]

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