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Kiyoshi Oguri: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Kiyoshi Oguri, Yuichiro Shibata, Akira Nagoya
    Asynchronous Bit-Serial Datapath for Object-Oriented Reconfigurable Architecture PCA. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2003, pp:54-68 [Conf]
  2. Norbert Imlig, Ryusuke Konishi, Tsunemichi Shiozawa, Kiyoshi Oguri, Kouichi Nagami, Hideyuki Ito, Minoru Inamori, Hiroshi Nakada
    Communicating logic: an alternative embedded stream processing paradigm. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 2000, pp:317-322 [Conf]
  3. Ryusuke Konishi, Hideyuki Ito, Hiroshi Nakada, Akira Nagoya, Norbert Imlig, Tsunemichi Shiozawa, Minoru Inamori, Kouichi Nagami, Kiyoshi Oguri
    PCA-1: A Fully Asynchronous, Self-Reconfigurable LSI. [Citation Graph (0, 0)][DBLP]
    ASYNC, 2001, pp:54-0 [Conf]
  4. Shinya Kyusaka, Hayato Higuchi, Taichi Nagamoto, Yuichiro Shibata, Kiyoshi Oguri
    Evaluation of Space Allocation Circuits. [Citation Graph (0, 0)][DBLP]
    EUC, 2005, pp:428-437 [Conf]
  5. Taichi Nagamoto, Satoshi Yano, Mitsuru Uchida, Yuichiro Shibata, Kiyoshi Oguri
    New Area Management Method Based on "Pressure" for Plastic Cell Architecture. [Citation Graph (0, 0)][DBLP]
    EUC, 2005, pp:418-427 [Conf]
  6. Kouichi Nagami, Kiyoshi Oguri, Tsunemichi Shiozawa, Hideyuki Ito, Ryusuke Konishi
    Plastic Cell Architecture: Towards Reconfigurable Computing for General-Purpose. [Citation Graph (0, 0)][DBLP]
    FCCM, 1998, pp:68-77 [Conf]
  7. Takehiro Ito, Yuichiro Shibata, Kiyoshi Oguri
    Implementation of the Extended Euclidean Algorithm for the Tate Pairing on FPGA. [Citation Graph (0, 0)][DBLP]
    FPL, 2004, pp:911-916 [Conf]
  8. Naoki Iwanaga, Yuichiro Shibata, Masato Yoshimi, Yasunori Osana, Yow Iwaoka, Tomonori Fukushima, Hideharu Amano, Akira Funahashi, Noriko Hiroi, Hiroaki Kitano, Kiyoshi Oguri
    Efficient Scheduling of Rate Law Functions for ODE-Based Multimodel Biochemical Simulation on an FPGA. [Citation Graph (0, 0)][DBLP]
    FPL, 2005, pp:666-669 [Conf]
  9. Tsunemichi Shiozawa, Norbert Imlig, Kouichi Nagami, Kiyoshi Oguri, Akira Nagoya, Hiroshi Nakada
    An Implementation of Longest Prefix Matching for IP Router on Plastic Cell Architecture. [Citation Graph (0, 0)][DBLP]
    FPL, 2000, pp:805-809 [Conf]
  10. Tsunemichi Shiozawa, Kiyoshi Oguri, Kouichi Nagami, Hideyuki Ito, Ryusuke Konishi, Norbert Imlig
    A Hardware Implementation of Constraint Satisfaction Problem Based on New Reconfigurable LSI Architecture. [Citation Graph (0, 0)][DBLP]
    FPL, 1998, pp:426-430 [Conf]
  11. Akira Nagoya, Yukihiro Nakamura, Kiyoshi Oguri, Ryo Nomura
    Multi-Level Optimization for Large Scale ASICS. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1990, pp:564-567 [Conf]
  12. Kiyoshi Oguri, Norbert Imlig, Hideyuki Ito, Kouichi Nagami, Ryusuke Konishi, Tsunemichi Shiozawa
    General-Purpose Computer Architecture Based on Fully Programmable Logic. [Citation Graph (0, 0)][DBLP]
    ICES, 1998, pp:323-334 [Conf]
  13. Hiroshi Nakada, Kiyoshi Oguri, Norbert Imlig, Minoru Inamori, Ryusuke Konishi, Hideyuki Ito, Kouichi Nagami, Tsunemichi Shiozawa
    Plastic Cell Architecture: A Dynamically Reconfigurable Hardware-Based Computer. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP Workshops, 1999, pp:679-687 [Conf]
  14. Hiroshi Nakada, Hideyuki Ito, Ryusuke Konishi, Akira Nagoya, Kiyoshi Oguri, Tsunemichi Shiozawa, Norbert Imlig
    Self-reorganising systems on VLSI circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2001, pp:310-313 [Conf]
  15. Hideyuki Ito, Kiyoshi Oguri, Kouichi Nagami, Ryusuke Konishi, Tsunemichi Shiozawa
    The Plastic Cell Architecture for Dynamic Reconfigurable Computing. [Citation Graph (0, 0)][DBLP]
    International Workshop on Rapid System Prototyping, 1998, pp:39-44 [Conf]
  16. Hiroyuki Yamashita, Toshihiko Suguri, Shingo Kinoshita, Yasushi Okada, Kiyoshi Oguri
    Message routing latency-minimizing method in an ASIC design for distributed cooperative communication protocol processing. [Citation Graph (0, 0)][DBLP]
    Systems and Computers in Japan, 1998, v:29, n:3, pp:39-58 [Journal]
  17. Miwa Miyata, Hideyuki Tsuchiya, Yuichiro Shibata, Kiyoshi Oguri
    An Implementation Technique of Multi-Cycled Arithmetic Functions For a Dynamically Reconfigurable Processor. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-4 [Conf]

  18. Bayesian Multi-topic Microarray Analysis with Hyperparameter Reestimation. [Citation Graph (, )][DBLP]


  19. Dynamic hyperparameter optimization for bayesian topical trend analysis. [Citation Graph (, )][DBLP]


  20. Retrieving 3-d information with FPGA-based stream processing. [Citation Graph (, )][DBLP]


  21. Implementation of a barotropic operator for ocean model simulation using a reconfigurable machine. [Citation Graph (, )][DBLP]


  22. A Combining technique of rate law functions for a cost-effective reconfigurable biological simulator. [Citation Graph (, )][DBLP]


  23. An optimization method of DMA transfer for a general purpose reconfigurable machine. [Citation Graph (, )][DBLP]


  24. Configuring area and performance: Empirical evaluation on an FPGA-based biochemical simulator. [Citation Graph (, )][DBLP]


  25. Accelerating Collapsed Variational Bayesian Inference for Latent Dirichlet Allocation with Nvidia CUDA Compatible Devices. [Citation Graph (, )][DBLP]


  26. Modeling Topical Trends over Continuous Time with Priors. [Citation Graph (, )][DBLP]


  27. Bag of Timestamps: A Simple and Efficient Bayesian Chronological Mining. [Citation Graph (, )][DBLP]


  28. Pipeline Scheduling with Input Port Constraints for an FPGA-Based Biochemical Simulator. [Citation Graph (, )][DBLP]


  29. A Modular Approach to Heterogeneous Biochemical Model Simulation on an FPGA. [Citation Graph (, )][DBLP]


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