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Jay B. Brockman: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Arun Rodrigues, Richard C. Murphy, Peter M. Kogge, Jay B. Brockman, Ron Brightwell, Keith D. Underwood
    Implications of a PIM Architectural Model for MPI. [Citation Graph (0, 0)][DBLP]
    CLUSTER, 2003, pp:259-0 [Conf]
  2. Eric W. Johnson, Jay B. Brockman
    Incorporating Design Schedule Management into a Flow Management System. [Citation Graph (0, 0)][DBLP]
    DAC, 1995, pp:82-87 [Conf]
  3. Eric W. Johnson, Luis A. Castillo, Jay B. Brockman
    Application of a Markov Model to the Measurement, Simulation, and Diagnosis of an Iterative Design Process. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:185-188 [Conf]
  4. Arun N. Lokanathan, Jay B. Brockman
    Process Multi-Circuit Optimization. [Citation Graph (0, 0)][DBLP]
    DAC, 1998, pp:382-387 [Conf]
  5. Arun N. Lokanathan, Jay B. Brockman, John E. Renaud
    A Methodology for Concurrent Fabrication Process/Cell Library Optimization. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:825-830 [Conf]
  6. Peter R. Sutton, Jay B. Brockman, Stephen W. Director
    Design Management Using Dynamically Defined Flows. [Citation Graph (0, 0)][DBLP]
    DAC, 1993, pp:648-653 [Conf]
  7. Shyamkumar Thoziyoor, Jay B. Brockman, Daniel Rinzler
    PIM lite: a multithreaded processor-in-memory prototype. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2005, pp:64-69 [Conf]
  8. Jay B. Brockman, Stephen W. Director
    The Hercules CAD Task Management System. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1991, pp:254-257 [Conf]
  9. Eric W. Johnson, Jay B. Brockman
    Sensitivity analysis of iterative design processes. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1996, pp:142-145 [Conf]
  10. Jay B. Brockman, Peter M. Kogge, Thomas L. Sterling, Vincent W. Freeh, Shannon K. Kuntz
    Microservers: a new memory semantics for massively parallel computing. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1999, pp:454-463 [Conf]
  11. Jay B. Brockman, Stephen W. Director
    A Schema-Based Approach to CAD Task Management. [Citation Graph (0, 0)][DBLP]
    Electronic Design Automation Frameworks, 1992, pp:71-84 [Conf]
  12. Lilia Yerosheva, Shannon K. Kuntz, Peter M. Kogge, Jay B. Brockman
    A Microserver View of HTMT. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2001, pp:3- [Conf]
  13. Xinhui Niu, Jay B. Brockman
    A Bayesian Approach to Variable Screening for Modeling the IC Fabrication Process. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:1227-1230 [Conf]
  14. Gary H. Bernstein, Jay B. Brockman, Peter M. Kogge, Gregory L. Snider, Barbara E. Walvoord
    From Bits to Chips: A Multidisciplinary Curriculum for Microelectronics System Design Education. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:95-97 [Conf]
  15. James F. Kramer, Matthias Scheutz, Jay B. Brockman, Peter M. Kogge
    Facing up to the Inevitable: Intelligent Error Recovery in Massively Parallel Processing in Memory Architectures. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2006, pp:227-233 [Conf]
  16. Ed Upchurch, Thomas L. Sterling, Jay B. Brockman
    Analysis and Modeling of Advanced PIM Architecture Design Tradeoffs. [Citation Graph (0, 0)][DBLP]
    SC, 2004, pp:12- [Conf]
  17. Jay B. Brockman, Shyamkumar Thoziyoor, Shannon K. Kuntz, Peter M. Kogge
    A low cost, multithreaded processing-in-memory system. [Citation Graph (0, 0)][DBLP]
    WMPI, 2004, pp:16-22 [Conf]
  18. Jay B. Brockman, Stephen W. Director
    The schema-based approach to workflow management. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:10, pp:1257-1267 [Journal]
  19. Arun N. Lokanathan, Jay B. Brockman
    A methodology for concurrent process-circuit optimization. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:7, pp:889-902 [Journal]
  20. Eric W. Johnson, Jay B. Brockman
    Measurement and analysis of sequential design processes. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 1998, v:3, n:1, pp:1-20 [Journal]
  21. Sheng Li, Amit Kashyap, Shannon K. Kuntz, Jay B. Brockman, Peter M. Kogge, Paul L. Springer, Gary Block
    A Heterogeneous Lightweight Multithreaded Architecture. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2007, pp:1-8 [Conf]

  22. Performance analysis of accelerated image registration using GPGPU. [Citation Graph (, )][DBLP]

  23. Design of a mask-programmable memory/multiplier array using G4-FET technology. [Citation Graph (, )][DBLP]

  24. Memory model effects on application performance for a lightweight multithreaded architecture. [Citation Graph (, )][DBLP]

  25. A Comprehensive Memory Modeling Tool and Its Application to the Design and Analysis of Future Memory Hierarchies. [Citation Graph (, )][DBLP]

  26. McPAT: an integrated power, area, and timing modeling framework for multicore and manycore architectures. [Citation Graph (, )][DBLP]

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