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Jack V. Briner Jr.: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jack V. Briner Jr.
    A Framework for Analyzing Parallel Discrete Event Simulation. [Citation Graph (0, 0)][DBLP]
    Int. CMG Conference, 1988, pp:180-185 [Conf]
  2. Jack V. Briner Jr., John L. Ellis, Gershon Kedem
    Breaking the Barrier of Parallel Simulation of Digital Systems. [Citation Graph (0, 0)][DBLP]
    DAC, 1991, pp:223-226 [Conf]
  3. Mary L. Bailey, Jack V. Briner Jr., Roger D. Chamberlain
    Parallel Logic Simulation of VLSI Systems. [Citation Graph (0, 0)][DBLP]
    ACM Comput. Surv., 1994, v:26, n:3, pp:255-294 [Journal]

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