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Yue Qian: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Yong-ran Chen, Xing-yun Qi, Yue Qian, Wen-hua Dou
    PMPS(3): A Performance Model of Parallel Systems. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2006, pp:344-350 [Conf]

  2. Analysis of communication delay bounds for network on chips. [Citation Graph (, )][DBLP]

  3. Applying network calculus for performance analysis of self-similar traffic in on-chip networks. [Citation Graph (, )][DBLP]

  4. From 2D to 3D NoCs: A case study on worst-case communication performance. [Citation Graph (, )][DBLP]

  5. Analysis of worst-case delay bounds for best-effort communication in wormhole networks on chip. [Citation Graph (, )][DBLP]

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