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Oliver Diessel: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Lih Wen Koh, Oliver Diessel
    Functional Unit Chaining: A Runtime Adaptive Architecture for Reducing Bypass Delays. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2006, pp:161-174 [Conf]
  2. Marco Torre, Usama Malik, Oliver Diessel
    A Configuration System Architecture Supporting Bit-Stream Compression for FPGAs. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2005, pp:415-428 [Conf]
  3. Shannon Koh, Oliver Diessel
    COMMA: A Communications Methodology for Dynamic Module-based Reconfiguration of FPGAs. [Citation Graph (0, 0)][DBLP]
    ARCS Workshops, 2006, pp:173-182 [Conf]
  4. Oliver Diessel, Usama Malik, Keith So
    Towards High-Level Specification, Synthesis, and Virtualization of Programmable Logic Designs (Research Note). [Citation Graph (0, 0)][DBLP]
    Euro-Par, 2002, pp:314-318 [Conf]
  5. Shannon Koh, Oliver Diessel
    COMMA: A Communications Methodology for Dynamic Module Reconfiguration in FPGAs. [Citation Graph (0, 0)][DBLP]
    FCCM, 2006, pp:273-274 [Conf]
  6. Oliver Diessel, Hossam A. ElGindy
    Partial FPGA Rearrangement by Local Repacking (Abstract). [Citation Graph (0, 0)][DBLP]
    FPGA, 1998, pp:259- [Conf]
  7. Gordon J. Brebner, Oliver Diessel
    Chip-Based Reconfigurable Task Management. [Citation Graph (0, 0)][DBLP]
    FPL, 2001, pp:182-191 [Conf]
  8. Oliver Diessel, Hossam A. ElGindy
    Run-time compaction of FPGA designs. [Citation Graph (0, 0)][DBLP]
    FPL, 1997, pp:131-140 [Conf]
  9. Oliver Diessel, George J. Milne
    Behavioural Language Compilation with Virtual Hardware Management. [Citation Graph (0, 0)][DBLP]
    FPL, 2000, pp:707-717 [Conf]
  10. Usama Malik, Oliver Diessel
    A Configuration Memory Architecture for Fast Run-Time-Reconfiguration of FPGAs. [Citation Graph (0, 0)][DBLP]
    FPL, 2005, pp:636-639 [Conf]
  11. Oliver Diessel, Hossam A. ElGindy
    Partial Rearrangements of Space-Shared FPGAs. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP Workshops, 1998, pp:913-918 [Conf]
  12. Oliver Diessel, David A. Kearney, Grant B. Wigley
    A Web-Based Multiuser Operating System for Reconfiguarble Computing. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP Workshops, 1999, pp:579-587 [Conf]
  13. Oliver Diessel, George J. Milne
    Compiling Process Algebraic Descriptions into Reconfigurable Logic. [Citation Graph (0, 0)][DBLP]
    IPDPS Workshops, 2000, pp:916-923 [Conf]
  14. Oliver Diessel, Usama Malik
    An FPGA Interpreter with Virtual Hardware Management. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2002, pp:- [Conf]
  15. Hossam A. ElGindy, Viktor K. Prasanna, Hartmut Schmeck, Oliver Diessel
    Configurable Architectures Workshop (RAW 2000). [Citation Graph (0, 0)][DBLP]
    IPDPS Workshops, 2000, pp:870-872 [Conf]
  16. Bernd Scheuermann, Keith So, Michael Guntsch, Martin Middendorf, Oliver Diessel, Hossam A. ElGindy, Hartmut Schmeck
    FPGA implementation of population-based ant colony optimization. [Citation Graph (0, 0)][DBLP]
    Appl. Soft Comput., 2004, v:4, n:3, pp:303-322 [Journal]
  17. Oliver Diessel, Hossam A. ElGindy
    On Dynamic Task Scheduling for EPGA-Based Systems. [Citation Graph (0, 0)][DBLP]
    Int. J. Found. Comput. Sci., 2001, v:12, n:5, pp:645-669 [Journal]
  18. Bryan Beresford-Smith, Oliver Diessel, Hossam A. ElGindy
    Optimal Algorithms for Constrained Reconfigurable Meshes. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1996, v:39, n:1, pp:74-78 [Journal]
  19. Usama Malik, Oliver Diessel
    The Entropy of FPGA Reconfiguration. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-6 [Conf]

  20. Enabling RTR for industry. [Citation Graph (, )][DBLP]


  21. The Effectiveness of Configuration Merging in Point-to-Point Networks for Module-based FPGA Reconfiguration. [Citation Graph (, )][DBLP]


  22. Module Graph Merging and Placement to Reduce Reconfiguration Overheads in Paged FPGA Devices. [Citation Graph (, )][DBLP]


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