The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

C. T. Clarke: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. P. C. Kwan, C. T. Clarke
    FPGAs for Improved Energy Efficiency in Processor Based Systems. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2005, pp:440-449 [Conf]
  2. M. Bhardwaj, T. Srikanthan, C. T. Clarke
    A Reverse Converter for the 4-moduli Superset {2^n-1, 2^n, 2^n+1, 2^(n+1)+1}. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1999, pp:168-175 [Conf]
  3. M. Bhardwaj, T. Srikanthan, C. T. Clarke
    VLSI Costs of Arithmetic Parallelism: A Residue Reverse Conversion Perspectiv. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1999, pp:176-0 [Conf]
  4. X. H. Xu, C. T. Clarke, S. R. Jones
    High performance code compression architecture for the embedded ARM/THUMB processor. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2004, pp:451-456 [Conf]

  5. Elimination of sign precomputation in flat CORDIC. [Citation Graph (, )][DBLP]


Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002