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Siew Kei Lam: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Siew Kei Lam, Deng Yun, Thambipillai Srikanthan
    Morphable Structures for Reconfigurable Instruction Set Processors. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2005, pp:450-463 [Conf]
  2. Siew Kei Lam, Mohammed Shoaib, Thambipillai Srikanthan
    Modeling Arbitrator Delay-Area Dependencies in Customizable Instruction Set Processors. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:237-242 [Conf]
  3. Leipo Yan, Siew Kei Lam, Thambipillai Srikanthan, Wu Jigang
    Energy Efficient Cache Tuning with Performance Bound. [Citation Graph (0, 0)][DBLP]
    DELTA, 2006, pp:97-100 [Conf]
  4. Suchitra Sathyanarayana, Siew Kei Lam, Thambipillai Srikanthan
    High-throughput image rotation using sign-prediction based redundant cordic algorithm. [Citation Graph (0, 0)][DBLP]
    ICIP, 2004, pp:2833-2836 [Conf]
  5. Siew Kei Lam, Devendra K. Chaudhaiy, Thambipillai Srikanthan
    Low cost logarithmic techniques for high-precision computations. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:125-128 [Conf]
  6. K. H. Quek, Siew Kei Lam, N. K. Agrawal, Thambipillai Srikanthan
    Architectural design and analysis toolbox to implement shortest path algorithms in hardware. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2003, pp:224-227 [Conf]
  7. H. Tian, Siew Kei Lam, Thambipillai Srikanthan
    Implementing Otsu's thresholding process using area-time efficient logarithmic approximation unit. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2003, pp:21-24 [Conf]
  8. H. Tian, Thambipillai Srikanthan, Vijayan K. Asari, Siew Kei Lam
    Study on the Effect of Object to Camera Distance on Polynomial Expansion Coefficients in Barrel Distortion Correction. [Citation Graph (0, 0)][DBLP]
    SSIAI, 2002, pp:255-259 [Conf]
  9. Siew Kei Lam, Thambipillai Srikanthan
    Dynamic multicast routing in VLSI. [Citation Graph (0, 0)][DBLP]
    Computer Communications, 2000, v:23, n:11, pp:1055-1063 [Journal]
  10. Siew Kei Lam, K. Sridharan, Thambipillai Srikanthan
    VLSI-efficient schemes for high-speed construction of tangent graph. [Citation Graph (0, 0)][DBLP]
    Robotics and Autonomous Systems, 2005, v:51, n:4, pp:248-260 [Journal]
  11. Thambipillai Srikanthan, Siew Kei Lam, Mishra Suman
    Area-Time Efficient Sign Detection Technique for Binary Signed-Digit Number System. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2004, v:53, n:1, pp:69-72 [Journal]
  12. Siew Kei Lam, Thambipillai Srikanthan, Christopher T. Clarke
    Rapid generation of custom instructions using predefined dataflow structures. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2006, v:30, n:6, pp:355-366 [Journal]

  13. Efficient Heuristic Algorithm for Rapid Custom-Instruction Selection. [Citation Graph (, )][DBLP]


  14. Estimating Area Costs of Custom Instructions for FPGA-based Reconfigurable Processors. [Citation Graph (, )][DBLP]


  15. Rapid design exploration framework for application-aware customization of soft core processors. [Citation Graph (, )][DBLP]


  16. A Short Course on Implementing FPGA Based Digital Systems. [Citation Graph (, )][DBLP]


  17. Area-Time Estimation of Controller for Porting C-Based Functions onto FPGA. [Citation Graph (, )][DBLP]


  18. Hierarchical Loop Partitioning for Rapid Generation of Runtime Configurations. [Citation Graph (, )][DBLP]


  19. Architecture-Aware Custom Instruction Generation for Reconfigurable Processors. [Citation Graph (, )][DBLP]


  20. An efficient architecture for adaptive progressive thresholding. [Citation Graph (, )][DBLP]


  21. Fuzzy-ART based image compression for hardware implementation. [Citation Graph (, )][DBLP]


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