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Yashwant K. Malaiya: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Yashwant K. Malaiya, Pradip K. Srimani
    An Introduction to Software Reliability Models. [Citation Graph (0, 0)][DBLP]
    Int. CMG Conference, 1991, pp:1237-1239 [Conf]
  2. Rochit Rajsuman, Anura P. Jayasumana, Yashwant K. Malaiya
    CMOS Stuck-open Fault Detection Using Single Test Patterns. [Citation Graph (0, 0)][DBLP]
    DAC, 1989, pp:714-717 [Conf]
  3. Rochit Rajsuman, Yashwant K. Malaiya, Anura P. Jayasumana
    On Accuracy of Switch-Level Modeling of Bridging Faults in Complex Gates. [Citation Graph (0, 0)][DBLP]
    DAC, 1987, pp:244-250 [Conf]
  4. Sung-Whan Woo, Omar H. Alhazmi, Yashwant K. Malaiya
    Assessing Vulnerabilities in Apache and IIS HTTP Servers. [Citation Graph (0, 0)][DBLP]
    DASC, 2006, pp:103-110 [Conf]
  5. Omar H. Alhazmi, Yashwant K. Malaiya, Indrajit Ray
    Security Vulnerabilities in Software Systems: A Quantitative Perspective. [Citation Graph (0, 0)][DBLP]
    DBSec, 2005, pp:281-294 [Conf]
  6. Sankaran M. Menon, Anura P. Jayasumana, Yashwant K. Malaiya
    Input Pattern Classification for Transistor Level Testing of Bridging Faults in BiCMOS Circuits. [Citation Graph (0, 0)][DBLP]
    Great Lakes Symposium on VLSI, 1996, pp:214-219 [Conf]
  7. Yashwant K. Malaiya, Jason Denton
    Estimating the Number of Residual Defects. [Citation Graph (0, 0)][DBLP]
    HASE, 1998, pp:98-0 [Conf]
  8. Anura P. Jayasumana, Yashwant K. Malaiya, Sankaran M. Menon
    A Novel High-Speed BiCMOS Domino Logic Family. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1995, pp:21-24 [Conf]
  9. Sankaran M. Menon, Anura P. Jayasumana, Yashwant K. Malaiya
    Test Generation for BiCMOS Circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:1987-1990 [Conf]
  10. Yashwant K. Malaiya, Jason Denton
    Module Size Distribution and Defect Density. [Citation Graph (0, 0)][DBLP]
    ISSRE, 2000, pp:62-71 [Conf]
  11. Omar H. Alhazmi, Yashwant K. Malaiya
    Modeling the Vulnerability Discovery Process. [Citation Graph (0, 0)][DBLP]
    ISSRE, 2005, pp:129-138 [Conf]
  12. Omar H. Alhazmi, Yashwant K. Malaiya
    Measuring and Enhancing Prediction Capabilities of Vulnerability Discovery Models for Apache and IIS HTTP Servers. [Citation Graph (0, 0)][DBLP]
    ISSRE, 2006, pp:343-352 [Conf]
  13. Chi-Chang Liaw, Stephen Y. H. Su, Yashwant K. Malaiya
    State Diagram Approach for Functional Testing of Control Section. [Citation Graph (0, 0)][DBLP]
    ITC, 1981, pp:433-446 [Conf]
  14. Yashwant K. Malaiya
    Faults in Microprogrammed and Hardwired Control. [Citation Graph (0, 0)][DBLP]
    ITC, 1985, pp:732- [Conf]
  15. Yashwant K. Malaiya, Ramesh Narayanaswamy
    Testing for Timing Faults in Synchronous Sequential Integrated Circuits. [Citation Graph (0, 0)][DBLP]
    ITC, 1983, pp:560-573 [Conf]
  16. Yashwant K. Malaiya, Shoubao Yang
    The Coverage Problem for Random Testing. [Citation Graph (0, 0)][DBLP]
    ITC, 1984, pp:237-245 [Conf]
  17. Ramanagopal V. Vogety, Yashwant K. Malaiya, Anura P. Jayasumana
    Interconnection of FDDI-II networks through an ATM backbone - An analysis. [Citation Graph (0, 0)][DBLP]
    LCN, 1995, pp:150-0 [Conf]
  18. S. Hwang, Rochit Rajsuman, Yashwant K. Malaiya
    On the testing of microprogrammed processor. [Citation Graph (0, 0)][DBLP]
    MICRO, 1990, pp:260-266 [Conf]
  19. Yashwant K. Malaiya
    On inherent untestability of unaugmented microprogrammed control. [Citation Graph (0, 0)][DBLP]
    MICRO, 1989, pp:88-96 [Conf]
  20. Yashwant K. Malaiya, S. Feng
    Design of a testable RISC-to-CISC control architecture. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:57-59 [Conf]
  21. Jiao Chen, Yashwant K. Malaiya
    Augmenting Test Case Generation Using Statechart. [Citation Graph (0, 0)][DBLP]
    Software Engineering Research and Practice, 2004, pp:608-614 [Conf]
  22. W. K. Al-Assadi, Yashwant K. Malaiya, Anura P. Jayasumana
    Use of Storage Elements as Primitives for Modelling Faults in Synchronous Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1993, pp:118-123 [Conf]
  23. Sankaran M. Menon, Yashwant K. Malaiya, Anura P. Jayasumana
    Input Pattern Classification for Detection of Stuck-ON and Bridging Faults Using I/sub DDQ/ Testing in BiCMOS and CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1997, pp:545-546 [Conf]
  24. Sankaran M. Menon, Yashwant K. Malaiya, Anura P. Jayasumana, Carol Q. Tong
    The Effect of Built-In Current Sensors (BICS) on Operational and Test Performance. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1994, pp:187-190 [Conf]
  25. Ashutosh Sharma, Anura P. Jayasumana, Yashwant K. Malaiya
    X-IDDQ: A Novel Defect Detection Technique Using IDDQ Data. [Citation Graph (0, 0)][DBLP]
    VTS, 2006, pp:180-185 [Conf]
  26. Omar H. Alhazmi, Sung-Whan Woo, Yashwant K. Malaiya
    Security vulnerability categories in major software systems. [Citation Graph (0, 0)][DBLP]
    Communication, Network, and Information Security, 2006, pp:138-143 [Conf]
  27. Yashwant K. Malaiya
    Guest Editor's Introduction: VLSI Design 92. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1992, v:9, n:4, pp:4-5 [Journal]
  28. Nachimuthu Karunanithi, Darrell Whitley, Yashwant K. Malaiya
    Using Neural Networks in Reliability Prediction. [Citation Graph (0, 0)][DBLP]
    IEEE Software, 1992, v:9, n:4, pp:53-59 [Journal]
  29. Pradip K. Srimani, Yashwant K. Malaiya
    Steps to Practical Reliability Meassurement - Guest Editors' Introduction. [Citation Graph (0, 0)][DBLP]
    IEEE Software, 1992, v:9, n:4, pp:10-12 [Journal]
  30. Chi-Chang Liaw, Stephen Y. H. Su, Yashwant K. Malaiya
    Test-Experiments for Detection and Location of Intermittent Faults in Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1981, v:30, n:12, pp:989-995 [Journal]
  31. Yashwant K. Malaiya, Stephen Y. H. Su
    Reliability Measure of Hardware Redundancy Fault-Tolerant Digital Systems with Intermittent Faults. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1981, v:30, n:8, pp:600-604 [Journal]
  32. Yinghua Min, Yashwant K. Malaiya, Boping Jin
    Analysis of Detection Capability of Parallel Signature Analyzers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1991, v:40, n:9, pp:1075-1081 [Journal]
  33. Stephen Y. H. Su, Israel Koren, Yashwant K. Malaiya
    A Continous-Parameter Markov Model and Detection Procedures for Intermittent Faults. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1978, v:27, n:6, pp:567-570 [Journal]
  34. Rochit Rajsuman, Yashwant K. Malaiya, Anura P. Jayasumana
    Limitations of switch level analysis for bridging faults. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:7, pp:807-811 [Journal]
  35. Nachimuthu Karunanithi, Darrell Whitley, Yashwant K. Malaiya
    Prediction of Software Reliability Using Connectionist Models. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Software Eng., 1992, v:18, n:7, pp:563-574 [Journal]
  36. Yashwant K. Malaiya, Anneliese von Mayrhauser, Pradip K. Srimani
    An Examination of Fault Exposure Ratio. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Software Eng., 1993, v:19, n:11, pp:1087-1094 [Journal]
  37. Artem Sokolov, Alodeep Sanyal, L. Darrell Whitley, Yashwant K. Malaiya
    Dynamic power minimization during combinational circuit testing as a traveling salesman problem. [Citation Graph (0, 0)][DBLP]
    Congress on Evolutionary Computation, 2005, pp:1088-1095 [Conf]
  38. W. K. Al-Assadi, Yashwant K. Malaiya, Anura P. Jayasumana
    Faulty behavior of storage elements and its effects on sequential circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1993, v:1, n:4, pp:446-452 [Journal]

  39. Vulnerability Discovery in Multi-Version Software Systems. [Citation Graph (, )][DBLP]


  40. Vulnerability Discovery Modeling Using Weibull Distribution. [Citation Graph (, )][DBLP]


  41. Seasonality in Vulnerability Discovery in Major Software Systems. [Citation Graph (, )][DBLP]


  42. Seasonal Variation in the Vulnerability Discovery Process. [Citation Graph (, )][DBLP]


  43. Measuring, analyzing and predicting security vulnerabilities in software systems. [Citation Graph (, )][DBLP]


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