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Publications of Author

1. Philip L. Karlton, Samuel H. Fuller, R. E. Scroggs, E. B. Kaehler
   Performance of Height-Balanced Trees. [Citation Graph (1, 0)][DBLP]
   Commun. ACM, 1976, v:19, n:1, pp:23-28 [Journal]
   
2. Samuel H. Fuller, Forest Baskett
   An Analysis of Drum Storage Units. [Citation Graph (1, 0)][DBLP]
   J. ACM, 1975, v:22, n:1, pp:83-105 [Journal]
   
3. Madhav V. Marathe, Samuel H. Fuller
   A Study of Multiprocessor Contention for Shared Data in C.MMP. [Citation Graph (0, 0)][DBLP]
   Int. CMG Conference, 1977, pp:255-262 [Conf]
   
4. Dileep Bhandarkar, Samuel H. Fuller
   Markov Chain Models for Analyzing Memory Interference in Multiprocessor Computer Systems. [Citation Graph (0, 0)][DBLP]
   ISCA, 1973, pp:1-6 [Conf]
   
5. Samuel H. Fuller
   Price/Performance Comparison of C.mmp and the PDP-10. [Citation Graph (0, 0)][DBLP]
   ISCA, 1976, pp:195-202 [Conf]
   
6. Samuel H. Fuller, Daniel P. Siewiorek, R. J. Swan
   Computer Modules: An Architecture for Large Digital Modules. [Citation Graph (0, 0)][DBLP]
   ISCA, 1973, pp:231-237 [Conf]
   
7. Samuel H. Fuller, Daniel P. Siewiorek, R. J. Swan
   The Design of a Multi-Micro-Computer System. [Citation Graph (0, 0)][DBLP]
   ISCA, 1976, pp:123- [Conf]
   
8. Donald D. Chamberlin, Samuel H. Fuller, Leonard Y. Liu
   A Page Allocation Strategy for Multiprogramming Systems with Virtual Memory. [Citation Graph (0, 0)][DBLP]
   SOSP, 1973, pp:66-72 [Conf]
   
9. Samuel H. Fuller
   Random Arrival and the MTPT Drum Scheduling Discipline. [Citation Graph (0, 0)][DBLP]
   SOSP, 1973, pp:54-57 [Conf]
   
10. Gordon Bell, Samuel H. Fuller, Daniel P. Siewiorek
    Forword to the Special Issue on Computer Architecture. [Citation Graph (0, 0)][DBLP]
    Commun. ACM, 1978, v:21, n:1, pp:3- [Journal]
    
11. Samuel H. Fuller
    Minimal-Total-Processing Time Drum and Disk Scheduling Disciplines. [Citation Graph (0, 0)][DBLP]
    Commun. ACM, 1974, v:17, n:7, pp:376-381 [Journal]
    
12. Harold S. Stone, Samuel H. Fuller
    On the Near-Optimality of the Shortest-Latency-Time-First Drum Scheduling Discipline. [Citation Graph (0, 0)][DBLP]
    Commun. ACM, 1973, v:16, n:6, pp:352-353 [Journal]
    
13. Samuel H. Fuller, Victor R. Lesser, Gordon Bell, Charles H. Kaman
    The Effects of Emerging Technology and Emulation Requirements on Microprogramming. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1976, v:25, n:10, pp:1000-1009 [Journal]
    
14. Samuel H. Fuller, Patrick F. McGehearty
    Minimizing Latency in CCD Memories. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1978, v:27, n:3, pp:252-254 [Journal]
    
15. 
    Evaluation of computer architectures via test programs. [Citation Graph (, )][DBLP]
    
    
16. 
    Cm*: a modular, multi-microprocessor. [Citation Graph (, )][DBLP]
    
    
17. 
    Using LSI processor bit-slices to build a PDP-11: a case study in microcomputer design. [Citation Graph (, )][DBLP]
    
    
18. 
    Initial selection and screening of the CFA candidate computer architectures. [Citation Graph (, )][DBLP]