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Publications of Author

1. Mongkol Ekpanyapong, Pinar Korkmaz, Hsien-Hsin S. Lee
   Choice Predictor for Free. [Citation Graph (0, 0)][DBLP]
   Asia-Pacific Computer Systems Architecture Conference, 2004, pp:399-413 [Conf]
   
2. Mongkol Ekpanyapong, Michael B. Healy, Sung Kyu Lim
   Placement for configurable dataflow architecture. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2005, pp:1127-1130 [Conf]
   
3. Mongkol Ekpanyapong, Sung Kyu Lim
   Performance-driven global placement via adaptive network characterization. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2004, pp:137-142 [Conf]
   
4. Mongkol Ekpanyapong, Thaisiri Watewai, Sung Kyu Lim
   Statistical Bellman-Ford algorithm with an application to retiming. [Citation Graph (0, 0)][DBLP]
   ASP-DAC, 2006, pp:959-964 [Conf]
   
5. Rodric M. Rabbah, Hariharan Sandanagobalane, Mongkol Ekpanyapong, Weng-Fai Wong
   Compiler orchestrated prefetching via speculation and predication. [Citation Graph (0, 0)][DBLP]
   ASPLOS, 2004, pp:189-198 [Conf]
   
6. Mongkol Ekpanyapong, Jacob R. Minz, Thaisiri Watewai, Hsien-Hsin S. Lee, Sung Kyu Lim
   Profile-guided microarchitectural floorplanning for deep submicron processor design. [Citation Graph (0, 0)][DBLP]
   DAC, 2004, pp:634-639 [Conf]
   
7. Michael B. Healy, Mario Vittes, Mongkol Ekpanyapong, Chinnakrishnan Ballapuram, Sung Kyu Lim, Hsien-Hsin S. Lee, Gabriel H. Loh
   Microarchitectural floorplanning under performance and thermal tradeoff. [Citation Graph (0, 0)][DBLP]
   DATE, 2006, pp:1288-1293 [Conf]
   
8. Michael B. Healy, Mongkol Ekpanyapong, Sung Kyu Lim
   MILP-based Placement and Routing for Dataflow Architecture. [Citation Graph (0, 0)][DBLP]
   FPL, 2005, pp:71-76 [Conf]
   
9. Mongkol Ekpanyapong, Chinnakrishnan Ballapuram, Sung Kyu Lim, Hsien-Hsin S. Lee
   Wire-driven microarchitectural design space exploration. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2005, pp:1867-1870 [Conf]
   
10. Mongkol Ekpanyapong, Karthik Balakrishnan, Vidit Nanda, Sung Kyu Lim
    Simultaneous delay and power optimization in global placement. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2004, pp:57-60 [Conf]
    
11. Mongkol Ekpanyapong, Sung Kyu Lim
    Integrated retiming and simultaneous Vdd/Vth scaling for total power minimization. [Citation Graph (0, 0)][DBLP]
    ISPD, 2006, pp:142-148 [Conf]
    
12. Mongkol Ekpanyapong, Jacob R. Minz, Thaisiri Watewai, Hsien-Hsin S. Lee, Sung Kyu Lim
    Profile-guided microarchitectural floor planning for deep submicron processor design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:7, pp:1289-1300 [Journal]
    
13. 
    An Efficient Computation of Statistically Critical Sequential Paths Under Retiming. [Citation Graph (, )][DBLP]