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Shuming Chen: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ma Pengyong, Chen Shuming
    MID: a Novel Coherency Protocol in Chip Multiprocessor. [Citation Graph (0, 0)][DBLP]
    CIT, 2006, pp:50- [Conf]
  2. Zhentao Li, Shuming Chen, Zhaoliang Li, Conghua Lei
    The Algorithm and Circuit Design of a 400MHz 16-Bit Hybrid Multiplier. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2006, pp:401-408 [Conf]
  3. Dong Wang, Xiao Hu, Shuming Chen, Yang Guo
    Bandwidth Optimization of the EMCI for a High Performance 32-bit DSP. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2006, pp:488-494 [Conf]
  4. Xiangyuan Liu, Shuming Chen
    Delay and Power Estimation Models of Low-Swing Interconnects for Design Planning. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:91-94 [Conf]
  5. Xiao Hu, Pengyong Ma, Shuming Chen, Yang Guo, Xing Fang
    TraceDo: An On-Chip Trace System for Real-Time Debug and Optimization in Multiprocessor SoC. [Citation Graph (0, 0)][DBLP]
    ISPA, 2006, pp:806-817 [Conf]
  6. Pengyong Ma, Xiao Hu, Shuming Chen, Yang Guo
    Pseudo Share Data Cache in Multiprocessor: PSDMP. [Citation Graph (0, 0)][DBLP]
    ISPA Workshops, 2006, pp:47-56 [Conf]
  7. Dong Wang, Xiaowen Chen, Shuming Chen, Xing Fang, Shuwei Sun
    FCC-SDP: A Fast Close-Coupled Shared Data Pool for Multi-core DSPs. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2007, pp:80-89 [Conf]
  8. Xing Fang, Dong Wang, Shuming Chen
    Exploiting Thread-Level Parallelism of Irregular LDPC Decoder with Simultaneous Multi-threading Technique. [Citation Graph (0, 0)][DBLP]
    APPT, 2007, pp:650-657 [Conf]
  9. Shuwei Sun, Dong Wang, Shuming Chen
    A Highly Efficient Parallel Algorithm for H.264 Encoder Based on Macro-Block Region Partition. [Citation Graph (0, 0)][DBLP]
    HPCC, 2007, pp:577-585 [Conf]
  10. Shuming Chen, Pengyong Ma
    FROCM: A Fair and Low-Overhead Method in SMT Processor. [Citation Graph (0, 0)][DBLP]
    HPCC, 2007, pp:566-576 [Conf]
  11. Xiao Hu, Pengyong Ma, Shuming Chen
    Scheduling for Combining Traffic of On-Chip Trace Data in Embedded Multi-core Processor. [Citation Graph (0, 0)][DBLP]
    ICESS, 2007, pp:67-79 [Conf]
  12. Shuming Chen, Xiangyuan Liu
    A Low-Latency and Low-Power Hybrid Insertion Methodology for Global Interconnects in VDSM Designs. [Citation Graph (0, 0)][DBLP]
    NOCS, 2007, pp:75-82 [Conf]

  13. SPVA: A novel digital signal processor architecture for Software Defined Radio. [Citation Graph (, )][DBLP]


  14. Supporting Distributed Shared Memory on multi-core Network-on-Chips using a dual microcoded controller. [Citation Graph (, )][DBLP]


  15. A DRAM Precharge Policy Based on Address Analysis. [Citation Graph (, )][DBLP]


  16. Mapping of H.264/AVC Encoder on a Hierarchical Chip Multicore DSP Platform. [Citation Graph (, )][DBLP]


  17. Efficient Bit-Rate Estimation for Mode Decision of H.264/AVC. [Citation Graph (, )][DBLP]


  18. Combinational logic SER estimation with the presence of re-convergence. [Citation Graph (, )][DBLP]


  19. An Efficient Parallel Algorithm for H.264/AVC Encoder. [Citation Graph (, )][DBLP]


  20. An On-Line Control Flow Checking Method for VLIW Processor. [Citation Graph (, )][DBLP]


  21. Applications of On-chip Trace on Debugging Embedded Processor. [Citation Graph (, )][DBLP]


  22. Analysis of Glitch Reconvergence in Combinational Logic SER Estimation. [Citation Graph (, )][DBLP]


  23. Fast and Accurate Estimate SET Voltage Pulses from Transient Currents Induced by Heavy Ion. [Citation Graph (, )][DBLP]


  24. M2SI: An Improved Coherency Protocol in CMP. [Citation Graph (, )][DBLP]


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