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Publications of Author

1. N. Amini, Mahdi Fazeli, Seyed Ghassem Miremadi, M. T. Manzuri
   Distance-Based Segmentation: An Energy-Efficient Clustering Hierarchy for Wireless Microsensor Networks. [Citation Graph (0, 0)][DBLP]
   CNSR, 2007, pp:18-25 [Conf]
   
2. Ahmad Patooghy, Seyed Ghassem Miremadi, A. Javadtalab, Mahdi Fazeli, N. Farazmand
   A Solution to Single Point of Failure Using Voter Replication and Disagreement Detection. [Citation Graph (0, 0)][DBLP]
   DASC, 2006, pp:171-176 [Conf]
   
3. Mahdi Fazeli, Reza Farivar, Seyed Ghassem Miremadi
   A Software-Based Concurrent Error Detection Technique for PowerPC Processor-based Embedded Systems. [Citation Graph (0, 0)][DBLP]
   DFT, 2005, pp:266-274 [Conf]
   
4. Yasser Sedaghat, Seyed Ghassem Miremadi, Mahdi Fazeli
   A Software-Based Error Detection Technique Using Encoded Signatures. [Citation Graph (0, 0)][DBLP]
   DFT, 2006, pp:389-400 [Conf]
   
5. Mahdi Fazeli, Hamid Sarbazi-Azad, Reza Farivar
   Parallel Clustering on the Star Graph. [Citation Graph (0, 0)][DBLP]
   ICA3PP, 2005, pp:287-292 [Conf]
   
6. Reza Farivar, Mahdi Fazeli, Seyed Ghassem Miremadi
   Directed Flooding: A Fault-Tolerant Routing Protocol for Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP]
   ICW/ICHSN/ICMCS/SENET, 2005, pp:395-399 [Conf]
   
7. Reza Farivar, Mahdi Fazeli, Hamid Sarbazi-Azad
   A Cordic-Based Processor Extension for Scalar and Vector Processing. [Citation Graph (0, 0)][DBLP]
   IPDPS, 2005, pp:- [Conf]
   
8. Mahdi Fazeli, Reza Farivar, Shaahin Hessabi, Seyed Ghassem Miremadi
   A Fault Tolerant Approach to Object Oriented Design and Synthesis of Embedded Systems. [Citation Graph (0, 0)][DBLP]
   LADC, 2005, pp:143-153 [Conf]
   
9. Mahdi Fazeli, Ahmad Patooghy, Seyed Ghassem Miremadi, Alireza Ejlali
   Feedback Redundancy: A Power Efficient SEU-Tolerant Latch Design for Deep Sub-Micron Technologies. [Citation Graph (0, 0)][DBLP]
   DSN, 2007, pp:276-285 [Conf]
   
10. 
    FEDC: Control Flow Error Detection and Correction for Embedded Systems without Program Interruption. [Citation Graph (, )][DBLP]
    
    
11. 
    A Power Efficient Masking Technique for Design of Robust Embedded Systems against SEUs and SET. [Citation Graph (, )][DBLP]
    
    
12. 
    An energy efficient circuit level technique to protect register file from MBUs and SETs in embedded processors. [Citation Graph (, )][DBLP]
    
    
13. 
    A Low Energy Soft Error-Tolerant Register File Architecture for Embedded Processors. [Citation Graph (, )][DBLP]
    
    
14. 
    A Low-Power and SEU-Tolerant Switch Architecture for Network on Chips. [Citation Graph (, )][DBLP]
    
    
15. 
    A Power Efficient Approach to Fault-Tolerant Register File Design. [Citation Graph (, )][DBLP]