|
Search the dblp DataBase
Gordon Steven:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- Daniel Tate, Gordon Steven, Fleur Steven
Static Scheduling for Out-of-order Instruction Issue Processors. [Citation Graph (0, 0)][DBLP] ACAC, 2000, pp:90-96 [Conf]
- Colin Egan, Gordon Steven, Lucian N. Vintan
Cached Two-Level Adaptive Branch Predictors with Multiple Stages. [Citation Graph (0, 0)][DBLP] ARCS, 2002, pp:179-194 [Conf]
- Colin Egan, Gordon Steven, Won Shim, Lucian N. Vintan
Applying Caching to Two-Level Adaptive Branch Prediction. [Citation Graph (0, 0)][DBLP] DSD, 2001, pp:186-193 [Conf]
- Roger Collins, Gordon Steven
Instruction Scheduling for a Superscalar Architecture. [Citation Graph (0, 0)][DBLP] EUROMICRO, 1996, pp:643-650 [Conf]
- Daniel Tate, Gordon Steven, Paul Findlay
The Impact of a Realistic Cache Structure on a Statically Scheduled Architecture. [Citation Graph (0, 0)][DBLP] EUROMICRO, 1998, pp:10325-10328 [Conf]
- Colin Egan, Gordon Steven, Patrick Quick, Rubén Anguera, Fleur Steven, Lucian N. Vintan
Two-level branch prediction using neural networks. [Citation Graph (0, 0)][DBLP] Journal of Systems Architecture, 2003, v:49, n:12-15, pp:557-570 [Journal]
Search in 0.024secs, Finished in 0.025secs
|