Sebastian Wallner A Reconfigurable Multi-threaded Architecture Model. [Citation Graph (0, 0)][DBLP] Asia-Pacific Computer Systems Architecture Conference, 2003, pp:193-207 [Conf]
Sebastian Wallner A Configurable System-on-Chip Architecture for Embedded Devices. [Citation Graph (0, 0)][DBLP] Asia-Pacific Computer Systems Architecture Conference, 2004, pp:58-71 [Conf]
Sebastian Wallner A Configurable System-on-Chip Architecture with Descriptors for Dynamic Reconfiguration. [Citation Graph (0, 0)][DBLP] ESA/VLSI, 2004, pp:157-163 [Conf]
Sebastian Wallner Micro-Task Processing in Heterogeneous Reconfigurable Systems. [Citation Graph (0, 0)][DBLP] J. Comput. Sci. Technol., 2005, v:20, n:5, pp:624-634 [Journal]
Sebastian Wallner A configurable system-on-chip architecture for embedded and real-time applications: concepts, design and realization. [Citation Graph (0, 0)][DBLP] Journal of Systems Architecture, 2005, v:51, n:6-7, pp:350-367 [Journal]