The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Guy Gogniat: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Guy Gogniat, Michel Auguin, Luc Bianco, Alain Pegatoquet
    Communication synthesis and HW/SW integration for embedded system design. [Citation Graph (0, 0)][DBLP]
    CODES, 1998, pp:49-53 [Conf]
  2. Luc Bianco, Michel Auguin, Guy Gogniat, Alain Pegatoquet
    A path analysis based partitioning for time constrained embedded systems. [Citation Graph (0, 0)][DBLP]
    CODES, 1998, pp:85-89 [Conf]
  3. Guy Gogniat, Michel Auguin, Cécile Belleudy
    A generic multi-unit architecture for codesign methodologies. [Citation Graph (0, 0)][DBLP]
    CODES, 1997, pp:23-28 [Conf]
  4. Lilian Bossuet, Guy Gogniat, Jean Luc Philippe
    Fast Design Space Exploration Method for Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP]
    Engineering of Reconfigurable Systems and Algorithms, 2003, pp:65-71 [Conf]
  5. Sebastien Bilavarn, Guy Gogniat, Jean Luc Philippe
    An estimation and exploration methodology from system-level specifications: application to FPGAs. [Citation Graph (0, 0)][DBLP]
    FPGA, 2003, pp:239- [Conf]
  6. Lilian Bossuet, Guy Gogniat, Jean Luc Philippe
    Communication Costs Driven Design Space Exploration for Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP]
    FPL, 2003, pp:921-933 [Conf]
  7. Guy Gogniat, Tilman Wolf, Wayne Burleson
    Reconfigurable Security Support for Embedded Systems. [Citation Graph (0, 0)][DBLP]
    HICSS, 2006, pp:- [Conf]
  8. Lilian Bossuet, Wayne Burleson, Guy Gogniat, Vikas Anand, Andrew Laffely, Jean Luc Philippe
    Targeting Tiled Architectures in Design Exploration. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:172- [Conf]
  9. Lilian Bossuet, Guy Gogniat, Wayne Burleson
    Dynamically Configurable Security for SRAM FPGA Bitstreams. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  10. Lilian Bossuet, Guy Gogniat, Jean Luc Philippe
    Generic Design Space Exploration for Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  11. Sebastien Bilavarn, Guy Gogniat, Jean Luc Philippe, Lilian Bossuet
    Fast prototyping of reconfigurable architectures from a C program. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:589-592 [Conf]
  12. Issam Maalej, Guy Gogniat, Mohamed Abid, Jean Luc Philippe
    Interface design approach for system on chip based on configuration. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:593-596 [Conf]
  13. Laurent Freund, Michel Israël, Frédéric Rousseau, J. M. Bergé, Michel Auguin, Cécile Belleudy, Guy Gogniat
    A Codesign Experiment in Acoustic Echo Cancellation: GMDFa. [Citation Graph (0, 0)][DBLP]
    ISSS, 1996, pp:83-0 [Conf]
  14. Romain Vaslin, Guy Gogniat, Jean-Philippe Diguet
    Secure Architecture in Embedded Systems: an Overview. [Citation Graph (0, 0)][DBLP]
    ReCoSoC, 2006, pp:60-67 [Conf]
  15. Guy Gogniat, Wayne Burleson, Lilian Bossuet
    Configurable Computing for High-Security/High-Performance Ambient Systems. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2005, pp:72-81 [Conf]
  16. Sebastien Bilavarn, Guy Gogniat, Jean Luc Philippe, Lilian Bossuet
    Design Space Pruning Through Early Estimations of Area/Delay Tradeoffs for FPGA Implementations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:10, pp:1950-1968 [Journal]
  17. Laurent Freund, Michel Israël, Frédéric Rousseau, J. M. Bergé, Michel Auguin, Cécile Belleudy, Guy Gogniat
    A codesign experiment in acoustic echo cancellation GMDF. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 1997, v:2, n:4, pp:365-383 [Journal]
  18. Guy Gogniat, Michel Auguin, Luc Bianco, Alain Pegatoquet
    A codesign back-end approach for embedded system design. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 2000, v:5, n:3, pp:492-509 [Journal]
  19. Jean-Philippe Diguet, Guy Gogniat, Jean Luc Philippe, Yannick Le Moullec, Sebastien Bilavarn, Christian Gamrat, Karim Ben Chehida, Michel Auguin, Xavier Fornari, Philippe Kajfasz
    EPICURE: A partitioning and co-design framework for reconfigurable computing. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2006, v:30, n:6, pp:367-387 [Journal]
  20. Eduardo Wanderley Neto, Reouven Elbaz, Lionel Torres, Gilles Sassatelli, Romain Vaslin, Guy Gogniat, Jean-Philippe Diguet
    IBC-EI: An Instruction Based Compression method with Encryption and Integrity Checking. [Citation Graph (0, 0)][DBLP]
    ReCoSoC, 2007, pp:138-145 [Conf]
  21. Romain Vaslin, Guy Gogniat, Eduardo Wanderley Neto, Russell Tessier, Wayne P. Burleson
    Low latency Solution for Confidentiality and Integrity Checking in Embedded Systems with Off-Chip Memory. [Citation Graph (0, 0)][DBLP]
    ReCoSoC, 2007, pp:146-153 [Conf]
  22. Jean-Philippe Diguet, Samuel Evain, Romain Vaslin, Guy Gogniat, Emmanuel Juin
    NOC-centric Security of Reconfigurable SoC. [Citation Graph (0, 0)][DBLP]
    NOCS, 2007, pp:223-232 [Conf]

  23. Ultra-Fast Downloading of Partial Bitstreams through Ethernet. [Citation Graph (, )][DBLP]


  24. A Code Compression Method with Confidentiality and Integrity Checking. [Citation Graph (, )][DBLP]


  25. A co-design approach for embedded system modeling and code generation with UML and MARTE. [Citation Graph (, )][DBLP]


  26. UML design for dynamically reconfigurable multiprocessor embedded systems. [Citation Graph (, )][DBLP]


  27. High-efficiency protection solution for off-chip memory in embedded systems. [Citation Graph (, )][DBLP]


  28. Networked Self-adaptive Systems: An Opportunity for Configuring in the Large. [Citation Graph (, )][DBLP]


  29. Bitstreams Repository Hierarchy for FPGA Partially Reconfigurable Systems. [Citation Graph (, )][DBLP]


  30. System Level Design Space Exploration for Multiprocessor System on Chip. [Citation Graph (, )][DBLP]


  31. A Code Compression Method to Cope with Security Hardware Overheads. [Citation Graph (, )][DBLP]


  32. A Networked, Lightweight and Partially Reconfigurable Platform. [Citation Graph (, )][DBLP]


  33. XPSoC: A reconfigurable solution for multimedia contents protection. [Citation Graph (, )][DBLP]


Search in 0.002secs, Finished in 0.306secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002