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Cagdas Akturan: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Cagdas Akturan, Margarida F. Jacome
    RS-FDRA: a register sensitive software pipelining algorithm for embedded VLIW processors. [Citation Graph (0, 0)][DBLP]
    CODES, 2001, pp:67-72 [Conf]
  2. Margarida F. Jacome, Gustavo de Veciana, Cagdas Akturan
    Resource constrained dataflow retiming heuristics for VLIW ASIPs. [Citation Graph (0, 0)][DBLP]
    CODES, 1999, pp:12-16 [Conf]
  3. Cagdas Akturan, Margarida F. Jacome
    CALiBeR: A Software Pipelining Algorithm for Clustered Embedded VLIW Processors. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2001, pp:112-118 [Conf]
  4. Cagdas Akturan, Margarida F. Jacome
    FDRA: A Software-Pipelining Algorithm for Embedded VLIW Processors. [Citation Graph (0, 0)][DBLP]
    ISSS, 2000, pp:34-40 [Conf]
  5. Cagdas Akturan, Margarida F. Jacome
    RS-FDRA: A register-sensitive software pipelining algorithm for embedded VLIW processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2002, v:21, n:12, pp:1395-1415 [Journal]

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