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Publications of Author

1. Massimo Baleani, Frank Gennari, Yunjian Jiang, Yatish Patel, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
   HW/SW partitioning and code generation of embedded control applications on a reconfigurable architecture platform. [Citation Graph (0, 0)][DBLP]
   CODES, 2002, pp:151-156 [Conf]
   
2. Yunjian Jiang, Robert K. Brayton
   Logic optimization and code generation for embedded control applications. [Citation Graph (0, 0)][DBLP]
   CODES, 2001, pp:225-229 [Conf]
   
3. Reinaldo A. Bergamaschi, Yunjian Jiang
   State-based power analysis for systems-on-chip. [Citation Graph (0, 0)][DBLP]
   DAC, 2003, pp:638-641 [Conf]
   
4. Yunjian Jiang, Robert K. Brayton
   Software synthesis from synchronous specifications using logic simulation techniques. [Citation Graph (0, 0)][DBLP]
   DAC, 2002, pp:319-324 [Conf]
   
5. Yunjian Jiang, Slobodan Matic, Robert K. Brayton
   Generalized cofactoring for logic function evaluation. [Citation Graph (0, 0)][DBLP]
   DAC, 2003, pp:155-158 [Conf]
   
6. Yunjian Jiang, Robert K. Brayton
   Don't Cares and Multi-Valued Logic Network Minimization. [Citation Graph (0, 0)][DBLP]
   ICCAD, 2000, pp:520-525 [Conf]
   
7. Robert K. Brayton, M. Gao, Jie-Hong Roland Jiang, Yunjian Jiang, Yinghua Li, Alan Mishchenko, Subarnarekha Sinha, Tiziano Villa
   Optimization of Multi-Valued Multi-Level Networks. [Citation Graph (0, 0)][DBLP]
   ISMVL, 2002, pp:168-0 [Conf]
   
8. Yunjian Jiang, Robert K. Brayton
   Don't Care Computation in Minimizing Extended Finite State Machines with Presburger Arithmetic. [Citation Graph (0, 0)][DBLP]
   IWLS, 2002, pp:327-332 [Conf]
   
9. 
   Improve clock gating through power-optimal enable function selection. [Citation Graph (, )][DBLP]