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Graziano Pravadelli: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Luca Formaggio, Franco Fummi, Graziano Pravadelli
    A timing-accurate HW/SW co-simulation of an ISS with SystemC. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2004, pp:152-157 [Conf]
  2. Nicola Bombieri, Franco Fummi, Graziano Pravadelli
    On the evaluation of transactor-based verification for reusing TLM assertions and testbenches at RTL. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:1007-1012 [Conf]
  3. Michele Borgatti, Andrea Capello, Umberto Rossi, Jean-Luc Lambert, Imed Moussa, Franco Fummi, Graziano Pravadelli
    An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:266-271 [Conf]
  4. Michele Borgatti, Andrea Capello, Umberto Rossi, Jean-Luc Lambert, Imed Moussa, Franco Fummi, Graziano Pravadelli
    An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:266-271 [Conf]
  5. Nicola Bombieri, Franco Fummi, Graziano Pravadelli
    At-Speed Functional Verification of Programmable Devices. [Citation Graph (0, 0)][DBLP]
    DFT, 2004, pp:386-394 [Conf]
  6. Paolo Azzoni, Andrea Fedeli, Franco Fummi, Graziano Pravadelli, Umberto Rossi, Franco Toto
    An error simulation based approach to measure error coverage of formal properties. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2002, pp:53-58 [Conf]
  7. Alessandro Fin, Franco Fummi, Graziano Pravadelli
    Mixing ATPG and property checking for testing HW/SW interfaces. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2003, pp:303-306 [Conf]
  8. Franco Fummi, Cristina Marconcini, Graziano Pravadelli
    An EFSM-based approach for functional ATPG. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2005, pp:197-200 [Conf]
  9. Franco Fummi, Graziano Pravadelli
    Logic-level analysis of high-level faults. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2004, pp:100-103 [Conf]
  10. Nicola Bombieri, Franco Fummi, Graziano Pravadelli
    Functional Verification of Networked Embedded Systems. [Citation Graph (0, 0)][DBLP]
    ISQED, 2005, pp:321-326 [Conf]
  11. Giuseppe Di Guglielmo, Franco Fummi, Cristina Marconcini, Graziano Pravadelli
    EFSM Manipulation to Increase High-Level ATPG Effectiveness. [Citation Graph (0, 0)][DBLP]
    ISQED, 2006, pp:57-62 [Conf]
  12. Alessandro Fin, Franco Fummi, Graziano Pravadelli
    AMLETO: a multi-language environment for functional test generation. [Citation Graph (0, 0)][DBLP]
    ITC, 2001, pp:821-829 [Conf]
  13. Stefano Brait, Franco Fummi, Graziano Pravadelli
    On the use of a high-level fault model to analyze logical consequence of properties. [Citation Graph (0, 0)][DBLP]
    MEMOCODE, 2005, pp:221-230 [Conf]
  14. Franco Fummi, Graziano Pravadelli, Andrea Fedeli, Umberto Rossi, Franco Toto
    On the Use of a High-Level Fault Model to Check Properties Incompleteness. [Citation Graph (0, 0)][DBLP]
    MEMOCODE, 2003, pp:145-152 [Conf]
  15. Michele Borgatti, Andrea Fedeli, Umberto Rossi, Jean-Luc Lambert, Imed Moussa, Franco Fummi, Cristina Marconcini, Graziano Pravadelli
    A Verification Methodology for Reconfigurable Systems. [Citation Graph (0, 0)][DBLP]
    MTV, 2004, pp:85-90 [Conf]
  16. Alessandro Fin, Franco Fummi, Massimo Poncino, Graziano Pravadelli
    A SystemC-based Framework for Properties Incompleteness Evaluation. [Citation Graph (0, 0)][DBLP]
    MTV, 2003, pp:89-94 [Conf]
  17. Giuseppe Di Guglielmo, Franco Fummi, Cristina Marconcini, Graziano Pravadelli
    A Pseudo-Deterministic Functional ATPG based on EFSM Traversing. [Citation Graph (0, 0)][DBLP]
    MTV, 2005, pp:70-75 [Conf]
  18. Giuseppe Di Guglielmo, Franco Fummi, Cristina Marconcini, Graziano Pravadelli
    Improving Gate-Level ATPG by Traversing Concurrent EFSMs. [Citation Graph (0, 0)][DBLP]
    VTS, 2006, pp:172-179 [Conf]
  19. Mirko Loghi, Tiziana Margaria, Graziano Pravadelli, Bernhard Steffen
    Dynamic and Formal Verification of Embedded Systems: A Comparative Survey. [Citation Graph (0, 0)][DBLP]
    International Journal of Parallel Programming, 2005, v:33, n:6, pp:585-611 [Journal]
  20. Franco Fummi, Cristina Marconcini, Graziano Pravadelli
    Logic-level mapping of high-level faults. [Citation Graph (0, 0)][DBLP]
    Integration, 2005, v:38, n:3, pp:467-490 [Journal]
  21. Andrea Fedeli, Franco Fummi, Graziano Pravadelli
    Properties Incompleteness Evaluation by Functional Verification. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2007, v:56, n:4, pp:528-544 [Journal]
  22. Nicola Bombieri, Franco Fummi, Graziano Pravadelli
    Incremental ABV for functional validation of TL-to-RTL design refinement. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:882-887 [Conf]
  23. Paolo Destro, Franco Fummi, Graziano Pravadelli
    A smooth refinement flow for co-designing HW and SW threads. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:105-110 [Conf]
  24. Nicola Bombieri, Franco Fummi, Graziano Pravadelli
    A methodology for abstracting RTL designs into TL descriptions. [Citation Graph (0, 0)][DBLP]
    MEMOCODE, 2006, pp:103-112 [Conf]
  25. Nicola Bombieri, Franco Fummi, Graziano Pravadelli, João Marques-Silva
    Towards Equivalence Checking Between TLM and RTL Models. [Citation Graph (0, 0)][DBLP]
    MEMOCODE, 2007, pp:113-122 [Conf]
  26. Nicola Bombieri, Franco Fummi, Graziano Pravadelli
    Hardware Design and Simulation for Verification. [Citation Graph (0, 0)][DBLP]
    SFM, 2006, pp:1-29 [Conf]
  27. Giuseppe Di Guglielmo, Franco Fummi, Cristina Marconcini, Graziano Pravadelli
    FATE: a Functional ATPG to Traverse Unstabilized EFSMs. [Citation Graph (0, 0)][DBLP]
    European Test Symposium, 2006, pp:179-184 [Conf]
  28. Michele Borgatti, Andrea Capello, Umberto Rossi, Jean-Luc Lambert, Imed Moussa, Franco Fummi, Graziano Pravadelli
    An Integrated Design and Verification Methodology for Reconfigurable Multimedia Systems [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]
  29. Fabrizio Ferrandi, Franco Fummi, Graziano Pravadelli, Donatella Sciuto
    Identification of design errors through functional testing. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Reliability, 2003, v:52, n:4, pp:400-412 [Journal]

  30. Abstraction of RTL IPs into embedded software. [Citation Graph (, )][DBLP]


  31. A Mutation Model for the SystemC TLM 2.0 Communication Interfaces. [Citation Graph (, )][DBLP]


  32. Correct-by-construction generation of device drivers based on RTL testbenches. [Citation Graph (, )][DBLP]


  33. Functional qualification of TLM verification. [Citation Graph (, )][DBLP]


  34. RTOS-aware refinement for TLM2.0-based HW/SW designs. [Citation Graph (, )][DBLP]


  35. Vacuity analysis for property qualification by mutation of checkers. [Citation Graph (, )][DBLP]


  36. The impact of EFSM composition on functional ATPG. [Citation Graph (, )][DBLP]


  37. On the Functional Qualification of a Platform Model. [Citation Graph (, )][DBLP]


  38. Vacuity Analysis by Fault Simulation. [Citation Graph (, )][DBLP]


  39. A CLP-Based Functional ATPG for Extended FSMs. [Citation Graph (, )][DBLP]


  40. Hybrid, Incremental Assertion-Based Verification for TLM Design Flows. [Citation Graph (, )][DBLP]


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