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Wolfram Hardt: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Giuseppe Del Castillo, Wolfram Hardt
    Fast dynamic analysis of complex HW/SW-systems based on abstract state machine models. [Citation Graph (0, 0)][DBLP]
    CODES, 1998, pp:77-81 [Conf]
  2. Wolfram Hardt, Wolfgang Rosenstiel
    Speed-up estimation for HW/SW-systems. [Citation Graph (0, 0)][DBLP]
    CODES, 1996, pp:36-43 [Conf]
  3. Heinz-Josef Eikerling, Wolfram Hardt, Joachim Gerlach, Wolfgang Rosenstiel
    A Methodology for Rapid Analysis and Optimization of Embedded Systems. [Citation Graph (0, 0)][DBLP]
    ECBS, 1996, pp:252-259 [Conf]
  4. Stefan Ihmor, Markus Visarius, Wolfram Hardt
    A Design Methodology for Application-Specific Real-Time Interfaces. [Citation Graph (0, 0)][DBLP]
    ICCD, 2002, pp:500-0 [Conf]
  5. Wolfram Hardt, Peter Altenbernd, Carsten Böke, Giuseppe Del Castillo, C. Ditze, E. Erpenbach, Uwe Glässer, Bernd Kleinjohann, Georg Lehrenfeld, Franz J. Rammig, Carsten Rust, Friedhelm Stappert, Joachim Stroop, Jürgen Tacken
    Paradise: Design Environment for Parallel & Distributed, Embedded Real-Time Systems. [Citation Graph (0, 0)][DBLP]
    DIPES, 1998, pp:181-190 [Conf]
  6. Achim Rettberg, Franz J. Rammig, Andreas Gerstlauer, Daniel Gajski, Wolfram Hardt, Bernd Kleinjohann
    The Specification Language SpecC within the PARADISE Design Environment. [Citation Graph (0, 0)][DBLP]
    DIPES, 2000, pp:111-120 [Conf]
  7. Stefan Ihmor, Markus Visarius, Wolfram Hardt
    A Consistent Design Methodology for Configurable HW/SW-interfaces in Embedded Systems. [Citation Graph (0, 0)][DBLP]
    DIPES, 2002, pp:237-246 [Conf]
  8. Wolfram Hardt, Achim Rettberg, Bernd Kleinjohann
    The Re-Configurable Delay-Intensitive FLYSIG Architecture. [Citation Graph (0, 0)][DBLP]
    IPPS/SPDP Workshops, 1999, pp:703-705 [Conf]
  9. Stefan Ihmor, Wolfram Hardt
    Runtime Reconfigurable Interfaces - The RTR-IFB Approach. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  10. Markus Deppe, Michael Robrecht, Mauro Cesar Zanella, Wolfram Hardt
    Rapid Prototyping of Real-Time Control Laws for Complex Mechatronic Systems. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2001, pp:188-193 [Conf]
  11. Wolfram Hardt, Bernd Kleinjohann
    FLYSIG: Dataflow Oriented Delay-Insensitive Processor for Rapid Prototyping of Signal Processing. [Citation Graph (0, 0)][DBLP]
    International Workshop on Rapid System Prototyping, 1998, pp:136-141 [Conf]
  12. Wolfram Hardt, Bernd Kleinjohann, Achim Rettberg
    The FLYSIG Prototyping Approach. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2000, pp:115-0 [Conf]
  13. Stefan Ihmor, N. Bastos Jr., R. Cardoso Klein, Markus Visarius, Wolfram Hardt
    Rapid Prototyping of Real-Time Communication---A Case Study: Interacting Robots. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:186-0 [Conf]
  14. Stefan Ihmor, Tobias Loke, Wolfram Hardt
    Synthesis of Communication Structures and Protocols in Distributed Embedded Systems. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2005, pp:3-9 [Conf]
  15. André Meisel, Markus Visarius, Wolfram Hardt, Stefan Ihmor
    Self-Reconfiguration of Communication Interfaces. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2004, pp:144-150 [Conf]
  16. Markus Visarius, André Meisel, Markus Scheithauer, Wolfram Hardt
    Dynamic Reconfiguration of IP-Based Systems. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2005, pp:70-76 [Conf]
  17. Markus Visarius, Johannes Lessmann, Wolfram Hardt, Frank Kelso, Wolfgang Thronicke
    An XML Format Based Integration Infrastructure for IP Based Design. [Citation Graph (0, 0)][DBLP]
    SBCCI, 2003, pp:119-124 [Conf]
  18. Wolfram Hardt, Bernd Kleinjohann
    Flysig: Dataflow Oriented Delay-Insensitive Processor for Rapid Prototyping of Signal Processing [Citation Graph (0, 0)][DBLP]
    CoRR, 1998, v:0, n:, pp:- [Journal]
  19. Markus Visarius, Johannes Lessmann, Frank Kelso, Wolfram Hardt
    Generic integration infrastructure for IP-based design processes and tools with a unified XML format. [Citation Graph (0, 0)][DBLP]
    Integration, 2004, v:37, n:4, pp:289-321 [Journal]
  20. Markus Visarius, Wolfram Hardt
    An IPQ Format based Toolbox to Support IP based Design (Ein IPQ Format basierter Werkzeugsatz zur Unterstützung von IP basiertem Entwurf). [Citation Graph (0, 0)][DBLP]
    it - Information Technology, 2005, v:47, n:2, pp:98-106 [Journal]
  21. Markus Deppe, Mauro Cesar Zanella, Michael Robrecht, Wolfram Hardt
    Rapid prototyping of real-time control laws for complex mechatronic systems: a case study. [Citation Graph (0, 0)][DBLP]
    Journal of Systems and Software, 2004, v:70, n:3, pp:263-274 [Journal]
  22. Rene Beckert, Thomas Fuchs, Steffen Rülke, Wolfram Hardt
    A Tailored Design Partitioning Method for Hardware Emulation. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2007, pp:99-105 [Conf]

  23. A Run-Time Scheduling Framework for a Reconfigurable Hardware Emulator. [Citation Graph (, )][DBLP]


  24. System Level Test of Service-based Systems by Automated and Dynamic Load Partitioning and Distribution. [Citation Graph (, )][DBLP]


  25. Design Flow for Reconfiguration Based on the Overlaying Concept. [Citation Graph (, )][DBLP]


  26. Communication-Aware Hierarchical Online-Placement in Heterogeneous Reconfigurable Systems. [Citation Graph (, )][DBLP]


  27. A Methodology for Embedded System Design supporting Layered Platforms. [Citation Graph (, )][DBLP]


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