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Publications of Author

1. Junwei Hou, Wayne Wolf
   Process Partitioning for Distributed Embedded Systems. [Citation Graph (0, 0)][DBLP]
   CODES, 1996, pp:70-76 [Conf]
   
2. Junwei Hou, Abhijit Chatterjee
   CONCERT: a concurrent transient fault simulator for nonlinear analog circuits. [Citation Graph (0, 0)][DBLP]
   ICCAD, 1998, pp:384-391 [Conf]
   
3. Junwei Hou, Abhijit Chatterjee
   Analog Transient Concurrent Fault Simulation with Dynamic Fault Grouping. [Citation Graph (0, 0)][DBLP]
   ICCD, 2000, pp:35-41 [Conf]
   
4. Junwei Hou, William H. Kao, Abhijit Chatterjee
   A novel concurrent fault simulation method for mixed-signal circuits. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 1999, pp:448-451 [Conf]
   
5. Ramakrishna Voorakaranam, Sudip Chakrabarti, Junwei Hou, Alfred V. Gomes, Sasikumar Cherubal, Abhijit Chatterjee, William H. Kao
   Hierarchical Specification-Driven Analog Fault Modeling for Efficient Fault Simulation and Diagnosis. [Citation Graph (0, 0)][DBLP]
   ITC, 1997, pp:903-912 [Conf]
   
6. Pramodchandran N. Variyam, Junwei Hou, Abhijit Chatterjee
   Test Generation for Analog Circuits Using Partial Numerical Simulation. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 1999, pp:597-602 [Conf]
   
7. Pramodchandran N. Variyam, Junwei Hou, Abhijit Chatterjee
   Efficient Test Generation for Transient Testing of Analog Circuits Using Partial Numerical Simulation. [Citation Graph (0, 0)][DBLP]
   VTS, 1999, pp:214-219 [Conf]
   
8. Junwei Hou, Abhijit Chatterjee
   Concurrent transient fault simulation for analog circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2003, v:22, n:10, pp:1385-1398 [Journal]