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Xinping Zhu: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]
Publications of Author
- Xinping Zhu, Wei Qin, Sharad Malik
Modeling operation and microarchitecture concurrency for communication architectures with application to retargetable simulation. [Citation Graph (0, 0)][DBLP]
CODES+ISSS, 2004, pp:66-71 [Conf] - Wei Qin, Joseph D'Errico, Xinping Zhu
A multiprocessing approach to accelerate retargetable and portable dynamic-compiled instruction-set simulation. [Citation Graph (0, 0)][DBLP]
CODES+ISSS, 2006, pp:193-198 [Conf] - Xinping Zhu, Wei Qin
Prototyping a fault-tolerant multiprocessor SoC with run-time fault recovery. [Citation Graph (0, 0)][DBLP]
DAC, 2006, pp:53-56 [Conf] - Xinping Zhu, Sharad Malik
Using a Communication Architecture Specification in an Application-Driven Retargetable Prototyping Platform for Multiprocessing. [Citation Graph (0, 0)][DBLP]
DATE, 2004, pp:1244-1249 [Conf] - Wei Qin, Subramanian Rajagopalan, Manish Vachharajani, Hangsheng Wang, Xinping Zhu, David I. August, Kurt Keutzer, Sharad Malik, Li-Shiuan Peh
Design Tools for Application Specific Embedded Processors. [Citation Graph (0, 0)][DBLP]
EMSOFT, 2002, pp:319-333 [Conf] - Xinping Zhu, Sharad Malik
A hierarchical modeling framework for on-chip communication architectures. [Citation Graph (0, 0)][DBLP]
ICCAD, 2002, pp:663-671 [Conf] - Hangsheng Wang, Xinping Zhu, Li-Shiuan Peh, Sharad Malik
Orion: a power-performance simulator for interconnection networks. [Citation Graph (0, 0)][DBLP]
MICRO, 2002, pp:294-305 [Conf] - Xinping Zhu, Wei Qin, Sharad Malik
Modeling operation and microarchitecture concurrency for communication architectures with application to retargetable simulation. [Citation Graph (0, 0)][DBLP]
IEEE Trans. VLSI Syst., 2006, v:14, n:7, pp:707-716 [Journal] - Xinping Zhu, Sharad Malik
A hierarchical modeling framework for on-chip communication architectures of multiprocessing SoCs. [Citation Graph (0, 0)][DBLP]
ACM Trans. Design Autom. Electr. Syst., 2007, v:12, n:1, pp:- [Journal]
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