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Kimish Patel: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Wonbok Lee, Kimish Patel, Massoud Pedram
    B2Sim: : a fast micro-architecture simulator based on basic block characterization. [Citation Graph (0, 0)][DBLP]
    CODES+ISSS, 2006, pp:199-204 [Conf]
  2. Kimish Patel, Enrico Macii, Massimo Poncino
    Synthesis of Partitioned Shared Memory Architectures for Energy-Efficient Multi-Processor SoC. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:700-701 [Conf]
  3. Kimish Patel, Luca Benini, Enrico Macii, Massimo Poncino
    STV-Cache: a leakage energy-efficient architecture for data caches. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:404-409 [Conf]
  4. Kimish Patel, Enrico Macii, Massimo Poncino
    Zero clustering: an approach to extend zero compression to instruction caches. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2005, pp:56-59 [Conf]
  5. Kimish Patel, Wonbok Lee, Massoud Pedram
    Active bank switching for temperature control of the register file in a microprocessor. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2007, pp:231-234 [Conf]
  6. Kimish Patel, Enrico Macii, Luca Benini, Massimo Poncino
    Reducing cache misses by application-specific re-configurable indexing. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2004, pp:125-130 [Conf]
  7. Kimish Patel, Enrico Macii, Massimo Poncino
    Frame Buffer Energy Optimization by Pixel Prediction. [Citation Graph (0, 0)][DBLP]
    ICCD, 2005, pp:98-101 [Conf]
  8. Kimish Patel, Enrico Macii, Massimo Poncino
    Energy-performance tradeoffs for the shared memory in multi-processor systems-on-chip. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:361-364 [Conf]
  9. Wonbok Lee, Kimish Patel, Massoud Pedram
    Dynamic thermal management for MPEG-2 decoding. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2006, pp:316-321 [Conf]
  10. Kimish Patel, Luca Benini, Enrico Macii, Massimo Poncino
    Energy-Efficient Value-Based Selective Refresh for Embedded DRAMs. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2005, pp:466-476 [Conf]
  11. Erik Brockmeyer, Jeroen van der Vegt, Arnout Vandecappelle, Kimish Patel
    Optimised Mapping of the QSDPCM Video Codec on MPARM: Shared Bus is not the Bottleneck. [Citation Graph (0, 0)][DBLP]
    PDPTA, 2005, pp:755-760 [Conf]
  12. Kimish Patel, Enrico Macii, Massimo Poncino, Luca Benini
    Energy-Efficient Value Based Selective Refresh for Embedded DRAMS. [Citation Graph (0, 0)][DBLP]
    J. Low Power Electronics, 2006, v:2, n:1, pp:70-79 [Journal]

  13. In-order pulsed charge recycling in off-chip data buses. [Citation Graph (, )][DBLP]


  14. Minimizing power dissipation during write operation to register files. [Citation Graph (, )][DBLP]


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