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Wei Zhang 0002: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Wei Zhang 0002
    Replica Victim Caching to Improve Reliability of In-Cache Replication. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:2-15 [Conf]
  2. Bramha Allu, Wei Zhang 0002
    Static next sub-bank prediction for drowsy instruction cache. [Citation Graph (0, 0)][DBLP]
    CASES, 2004, pp:124-131 [Conf]
  3. Wei Zhang 0002, Bramha Allu
    Loop-based leakage control for branch predictors. [Citation Graph (0, 0)][DBLP]
    CASES, 2004, pp:149-155 [Conf]
  4. Wei Zhang 0002, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin
    Performance, energy, and reliability tradeoffs in replicating hot cache lines. [Citation Graph (0, 0)][DBLP]
    CASES, 2003, pp:309-317 [Conf]
  5. Wei Zhang 0002, Bing Yu, Gregory J. Zelinsky, Dimitris Samaras
    Object Class Recognition Using Multiple Layer Boosting with Heterogeneous Features. [Citation Graph (0, 0)][DBLP]
    CVPR (2), 2005, pp:323-330 [Conf]
  6. Wei Zhang 0002, Guangyu Chen, Mahmut T. Kandemir, Mustafa Karaköy
    Interprocedural optimizations for improving data cache performance of array-intensive embedded applications. [Citation Graph (0, 0)][DBLP]
    DAC, 2003, pp:887-892 [Conf]
  7. Mahmut T. Kandemir, Guangyu Chen, Wei Zhang 0002, Ibrahim Kolcu
    Data Space Oriented Scheduling in Embedded Systems. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10416-10421 [Conf]
  8. Mahmut T. Kandemir, Ibrahim Kolcu, Wei Zhang 0002
    Implementation and Evaluation of an On-Demand Parameter-Passing Strategy for Reducing Energy. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:11058-11063 [Conf]
  9. Mahmut T. Kandemir, Wei Zhang 0002, Mustafa Karaköy
    Runtime Code Parallelization for On-Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10510-10515 [Conf]
  10. Hendra Saputra, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, R. R. Brooks, Soontae Kim, Wei Zhang 0002
    Masking the Energy Behavior of DES Encryption. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10084-10089 [Conf]
  11. Wei Zhang 0002, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Vivek De
    Compiler Support for Reducing Leakage Energy Consumption. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:11146-11147 [Conf]
  12. Wei Zhang 0002
    Computing Cache Vulnerability to Transient Errors and Its Implication. [Citation Graph (0, 0)][DBLP]
    DFT, 2005, pp:427-435 [Conf]
  13. Guangyu Chen, Ismail Kadayif, Wei Zhang 0002, Mahmut T. Kandemir, Ibrahim Kolcu, Ugur Sezer
    Compiler-Directed Management of Instruction Accesses. [Citation Graph (0, 0)][DBLP]
    DSD, 2003, pp:459-462 [Conf]
  14. Wei Zhang 0002, Sudhanva Gurumurthi, Mahmut T. Kandemir, Anand Sivasubramaniam
    ICR: In-Cache Replication for Enhancing Data Cache Reliability. [Citation Graph (0, 0)][DBLP]
    DSN, 2003, pp:291-0 [Conf]
  15. Wei Zhang 0002, Mustafa Karaköy, Mahmut T. Kandemir, Guangyu Chen
    A compiler approach for reducing data cache energy. [Citation Graph (0, 0)][DBLP]
    ICS, 2003, pp:76-85 [Conf]
  16. Wei Zhang 0002
    Compiler-Directed Data Cache Leakage Reduction. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2004, pp:305-306 [Conf]
  17. Jie S. Hu, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Hendra Saputra, Wei Zhang 0002
    Compiler-directed cache polymorphism. [Citation Graph (0, 0)][DBLP]
    LCTES-SCOPES, 2002, pp:165-174 [Conf]
  18. Wei Zhang 0002, Jie S. Hu, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
    Compiler-directed instruction cache leakage optimization. [Citation Graph (0, 0)][DBLP]
    MICRO, 2002, pp:208-218 [Conf]
  19. Wei Zhang 0002, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, David Duarte, Yuh-Fang Tsai
    Exploiting VLIW schedule slacks for dynamic and leakage energy reduction. [Citation Graph (0, 0)][DBLP]
    MICRO, 2001, pp:102-113 [Conf]
  20. Gregory J. Zelinsky, Wei Zhang 0002, Bing Yu, Xin Chen, Dimitris Samaras
    The Role of Top-down and Bottom-up Processes in Guiding Eye Movements during Visual Search. [Citation Graph (0, 0)][DBLP]
    NIPS, 2005, pp:- [Conf]
  21. Wei Zhang 0002, Hyejin Yang, Dimitris Samaras, Gregory J. Zelinsky
    A Computational Model of Eye Movements during Object Class Detection. [Citation Graph (0, 0)][DBLP]
    NIPS, 2005, pp:- [Conf]
  22. Bramha Allu, Wei Zhang 0002
    Exploiting the replication cache to improve performance for multiple-issue microprocessors. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:3, pp:63-71 [Journal]
  23. Wei Zhang 0002, Jie S. Hu, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
    Reducing instruction cache energy consumption using a compiler-based strategy. [Citation Graph (0, 0)][DBLP]
    TACO, 2004, v:1, n:1, pp:3-33 [Journal]
  24. Wei Zhang 0002, Mahmut T. Kandemir, Mustafa Karaköy, Guangyu Chen
    Reducing data cache leakage energy using a compiler-based approach. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2005, v:4, n:3, pp:652-678 [Journal]
  25. Wei Zhang 0002, Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    Reducing dynamic and leakage energy in VLIW architectures. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2006, v:5, n:1, pp:1-28 [Journal]
  26. Wei Zhang 0002, Bramha Allu
    Reducing branch predictor leakage energy by exploiting loops. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Embedded Comput. Syst., 2007, v:6, n:2, pp:- [Journal]
  27. Bramha Allu, Wei Zhang 0002
    Reducing Instruction Translation Look-Aside Buffer Energy Through Compiler-Directed Resizing. [Citation Graph (0, 0)][DBLP]
    J. Low Power Electronics, 2006, v:2, n:2, pp:140-147 [Journal]

  28. Real-time Accurate Object Detection using Multiple Resolutions. [Citation Graph (, )][DBLP]


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