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## Search the dblp DataBase
Hau T. Ngo:
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## Publications of Author- Ming Zhang, Hau T. Ngo, Vijayan K. Asari
**Design of an Efficient Multiplier-Less Architecture for Multi-dimensional Convolution.**[Citation Graph (0, 0)][DBLP] Asia-Pacific Computer Systems Architecture Conference, 2005, pp:65-78 [Conf] - Hau T. Ngo, Li Tao, Vijayan K. Asari
**A Nonlinear Technique for Enhancement of Color Images: An Architectural Perspective for Real-Time Applications.**[Citation Graph (0, 0)][DBLP] AIPR, 2004, pp:124-129 [Conf] - Li Tao, Hau T. Ngo, Ming Z. Zhang, Adam R. Livingston, Vijayan K. Asari
**A Multi-sensor Image Fusion and Enhancement System for Assisting Drivers in Poor Lighting Conditions.**[Citation Graph (0, 0)][DBLP] AIPR, 2005, pp:106-113 [Conf] - Hau T. Ngo, Vijayan K. Asari
**A Fully Pipelined Architecture for Barrel-Distortion Correction Based on Back Mapping, Linear Interpolation.**[Citation Graph (0, 0)][DBLP] Embedded Systems and Applications, 2003, pp:268-274 [Conf] - Hau T. Ngo, Rajkiran Gottumukkal, Vijayan K. Asari
**A Flexible and Efficient Hardware Architecture for Real-Time Face Recognition Based on Eigenface.**[Citation Graph (0, 0)][DBLP] ISVLSI, 2005, pp:280-281 [Conf] - Adam R. Livingston, Hau T. Ngo, Ming Z. Zhang, Li Tao, Vijayan K. Asari
**Design of a Real Time System for Nonlinear Enhancement of Video Streams by an Integrated Neighborhood Dependent Approach.**[Citation Graph (0, 0)][DBLP] ISVLSI, 2005, pp:301-302 [Conf] - Ming-Jung Seow, Hau T. Ngo, Vijayan K. Asari
**Systolic Array Implementation of Block Based Hopfield Neural Network for Pattern Association.**[Citation Graph (0, 0)][DBLP] ISVLSI, 2003, pp:213-214 [Conf] - Ming Z. Zhang, Hau T. Ngo, Adam R. Livingston, Vijayan K. Asari
**An Efficient VLSI Architecture for 2-D Convolution with Quadrant Symmetric Kernels.**[Citation Graph (0, 0)][DBLP] ISVLSI, 2005, pp:303-304 [Conf] - Hau T. Ngo, Li Tao, Vijayan K. Asari
**Design of an Efficient Architecture for Real-time Image Enhancement Based on a Luma-Dependent Nonlinear Approach.**[Citation Graph (0, 0)][DBLP] ITCC (1), 2004, pp:656-660 [Conf] - Hau T. Ngo, Vijayan K. Asari
**Design of a Low Power Multiply-Accumulator for 2D Convolution in Video Processing Applications.**[Citation Graph (0, 0)][DBLP] ITNG, 2007, pp:196-201 [Conf] - Hau T. Ngo, Vijayan K. Asari
**A pipelined architecture for real-time correction of barrel distortion in wide-angle camera images.**[Citation Graph (0, 0)][DBLP] IEEE Trans. Circuits Syst. Video Techn., 2005, v:15, n:3, pp:436-444 [Journal] - Rajkiran Gottumukkal, Hau T. Ngo, Vijayan K. Asari
**Multi-lane architecture for eigenface based real-time face recognition.**[Citation Graph (0, 0)][DBLP] Microprocessors and Microsystems, 2006, v:30, n:4, pp:216-224 [Journal] - Ming-Jung Seow, Hau T. Ngo, Vijayan K. Asari
**Systolic implementation of 2D block-based Hopfield neural network for efficient pattern association.**[Citation Graph (0, 0)][DBLP] Microprocessors and Microsystems, 2003, v:27, n:8, pp:359-366 [Journal] - Ming Z. Zhang, Hau T. Ngo, Vijayan K. Asari
**Multiplier-less VLSI architecture for real-time computation of multi-dimensional convolution.**[Citation Graph (0, 0)][DBLP] Microprocessors and Microsystems, 2007, v:31, n:1, pp:25-37 [Journal] **Design and Implementation of an Efficient and Power-Aware Architecture for Skin Segmentation in Color Video Stream.**[Citation Graph (, )][DBLP]**A Neighborhood Dependent Approach (NDA) for a Power-Aware Design of a Real-Time Video Enhancement System.**[Citation Graph (, )][DBLP]**Design of a Logarithmic Domain 2-D Convolver for Low Power Video Processing Applications.**[Citation Graph (, )][DBLP]
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