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Publications of Author

1. Ming Zhang, Hau T. Ngo, Vijayan K. Asari
   Design of an Efficient Multiplier-Less Architecture for Multi-dimensional Convolution. [Citation Graph (0, 0)][DBLP]
   Asia-Pacific Computer Systems Architecture Conference, 2005, pp:65-78 [Conf]
   
2. Ming Z. Zhang, Li Tao, Ming-Jung Seow, Vijayan K. Asari
   Design of an Efficient Flexible Architecture for Color Image Enhancement. [Citation Graph (0, 0)][DBLP]
   Asia-Pacific Computer Systems Architecture Conference, 2006, pp:323-336 [Conf]
   
3. Li Tao, Hau T. Ngo, Ming Z. Zhang, Adam R. Livingston, Vijayan K. Asari
   A Multi-sensor Image Fusion and Enhancement System for Assisting Drivers in Poor Lighting Conditions. [Citation Graph (0, 0)][DBLP]
   AIPR, 2005, pp:106-113 [Conf]
   
4. Adam R. Livingston, Hau T. Ngo, Ming Z. Zhang, Li Tao, Vijayan K. Asari
   Design of a Real Time System for Nonlinear Enhancement of Video Streams by an Integrated Neighborhood Dependent Approach. [Citation Graph (0, 0)][DBLP]
   ISVLSI, 2005, pp:301-302 [Conf]
   
5. Ming Z. Zhang, Hau T. Ngo, Adam R. Livingston, Vijayan K. Asari
   An Efficient VLSI Architecture for 2-D Convolution with Quadrant Symmetric Kernels. [Citation Graph (0, 0)][DBLP]
   ISVLSI, 2005, pp:303-304 [Conf]
   
6. Ming Z. Zhang, Hau T. Ngo, Vijayan K. Asari
   Multiplier-less VLSI architecture for real-time computation of multi-dimensional convolution. [Citation Graph (0, 0)][DBLP]
   Microprocessors and Microsystems, 2007, v:31, n:1, pp:25-37 [Journal]
   
7. Ming Z. Zhang, Vijayan K. Asari
   A Design Methodology for Performance-Resource Optimization of a Generalized 2D Convolution Architecture with Quadrant Symmetric Kernels. [Citation Graph (0, 0)][DBLP]
   Asia-Pacific Computer Systems Architecture Conference, 2007, pp:220-234 [Conf]
   
8. Ming Z. Zhang, Vijayan K. Asari
   An efficient multiplier-less architecture for 2-D convolution with quadrant symmetric kernels. [Citation Graph (0, 0)][DBLP]
   Integration, 2007, v:40, n:4, pp:490-502 [Journal]
   
9. 
   A New Framework for Automatic Feature Selection for Tracking. [Citation Graph (, )][DBLP]
   
   
10. 
    A Hardware Architecture for Color Image Enhancement Using a Machine Learning Approach with Adaptive Parameterization. [Citation Graph (, )][DBLP]
    
    
11. 
    A Fully Pipelined Multiplierless Architecture for 2D Convolution with Quadrant Symmetric Kernels. [Citation Graph (, )][DBLP]