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Minesh B. Amin :
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Minesh B. Amin , Donovan A. Schneider , V. Singh An Adaptive, Load Balancing Parallel Join Algorithm. [Citation Graph (1, 0)][DBLP ] COMAD, 1994, pp:0-0 [Conf ] Peter Wohl , John A. Waicukauski , Sanjay Patel , Minesh B. Amin Efficient compression and application of deterministic patterns in a logic BIST architecture. [Citation Graph (0, 0)][DBLP ] DAC, 2003, pp:566-569 [Conf ] Minesh B. Amin , Bapiraju Vinnakota Zamlog: a parallel algorithm for fault simulation based on Zambezi. [Citation Graph (0, 0)][DBLP ] ICCAD, 1996, pp:509-512 [Conf ] Minesh B. Amin , Bapiraju Vinnakota Data parallel fault simulation. [Citation Graph (0, 0)][DBLP ] ICCD, 1995, pp:610-615 [Conf ] Peter Wohl , John A. Waicukauski , Sanjay Patel , Minesh B. Amin X-Tolerant Compression And Application of Scan-ATPG Patterns In A BIST Architecture. [Citation Graph (0, 0)][DBLP ] ITC, 2003, pp:727-736 [Conf ] Pradip A. Thaker , Mona E. Zaghloul , Minesh B. Amin Study of Correlation of Testability Aspects of RTL Description and Resulting Structural Implementations. [Citation Graph (0, 0)][DBLP ] VLSI Design, 1999, pp:256-259 [Conf ] Minesh B. Amin , Bapiraju Vinnakota ZAMBEZI: a parallel pattern parallel fault sequential circuit fault simulator. [Citation Graph (0, 0)][DBLP ] VTS, 1996, pp:438-443 [Conf ] Samitha Samaranayake , Nodari Sitchinava , Rohit Kapur , Minesh B. Amin , Thomas W. Williams Dynamic Scan: Driving Down the Cost of Test. [Citation Graph (0, 0)][DBLP ] IEEE Computer, 2002, v:35, n:10, pp:63-68 [Journal ] Subburajan Ponnuswamy , Minesh B. Amin , Rakesh Jha , David A. Castañon A C3 I Parallel Benchmark Based on Genetic Algorithms - Implementation and Performance Analysis. [Citation Graph (0, 0)][DBLP ] J. Parallel Distrib. Comput., 1997, v:47, n:1, pp:23-38 [Journal ] Shashi Shekhar , Minesh B. Amin Generalization by Neural Networks. [Citation Graph (0, 6)][DBLP ] IEEE Trans. Knowl. Data Eng., 1992, v:4, n:2, pp:177-185 [Journal ] Vipin Kumar , Shashi Shekhar , Minesh B. Amin A Scalable Parallel Formulation of the Backpropagation Algorithm for Hypercubes and Related Architectures. [Citation Graph (0, 0)][DBLP ] IEEE Trans. Parallel Distrib. Syst., 1994, v:5, n:10, pp:1073-1090 [Journal ] Minesh B. Amin , Bapiraju Vinnakota Data parallel fault simulation. [Citation Graph (0, 0)][DBLP ] IEEE Trans. VLSI Syst., 1999, v:7, n:2, pp:183-190 [Journal ] Search in 0.001secs, Finished in 0.002secs