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Publications of Author

1. Yale N. Patt, Wen-mei W. Hwu, Stephen W. Melvin, Michael Shebanow, Chein Chen, Jiajuin Wei
   Experiments with HPS, a Restricted Data Flow Microarchitecture for High Performance Computers. [Citation Graph (0, 0)][DBLP]
   COMPCON, 1986, pp:254-258 [Conf]
   
2. Michael Butler, Tse-Yu Yeh, Yale N. Patt, Mitch Alsup, Hunter Scales, Michael Shebanow
   Single Instruction Stream Parallelism is Greater Than Two. [Citation Graph (0, 0)][DBLP]
   ISCA, 1991, pp:276-286 [Conf]
   
3. Mike Simone, A. Essen, A. Ike, A. Krishnamoorthy, Tak Maruyama, Niteen Patkar, M. Ramaswami, Michael Shebanow, V. Thirumalaiswamy, DeForest Tovey
   Implementation Trade-Offs in Using a Restricted Data Flow Architecture in a High Performance RISC Microprocessor. [Citation Graph (0, 0)][DBLP]
   ISCA, 1995, pp:151-162 [Conf]
   
4. Stephen W. Melvin, Michael Shebanow, Yale N. Patt
   Hardware support for large atomic units in dynamically scheduled machines. [Citation Graph (0, 0)][DBLP]
   MICRO, 1988, pp:60-63 [Conf]
   
5. James E. Wilson, Stephen W. Melvin, Michael Shebanow, Wen-mei W. Hwu, Yale N. Patt
   On tuning the microarchitecture of an HPS implementation of the VAX. [Citation Graph (0, 0)][DBLP]
   MICRO, 1987, pp:162-167 [Conf]
   
6. 
   Pervasive massively multithreaded GPU processors. [Citation Graph (, )][DBLP]