Search the dblp DataBase

Publications of Author

1. Tetsuhiko Okada, Susumu Narita, Osamu Nishii, Noriharu Hiratsuka, Nobuyuki Hayashi, Mitsuo Asai, Shinji Fujiwara, Mikiko Satoh, Junichi Nishimoto, Hirokazu Aoki, Kunio Uchiyama, Shigeru Matsuo, Hidehito Takewa, Kouji Yamada, Masahiro Kainaga, Norio Nakagawa, Masanobu Yamagami, Hiroshi Takeda, Tsuneo Funabashi
   A PA-RISC Mikroprocessor PA/50L For Low-Cost Systems. [Citation Graph (0, 0)][DBLP]
   COMPCON, 1994, pp:47-52 [Conf]
   
2. Toshihiro Hattori, Yusuke Nitta, Mitsuho Seki, Susumu Narita, Kunio Uchiyama, Tsuyoshi Takahashi, Ryuichi Satomura
   Design Methodology of a 200MHz Superscalar Microprocessor: SH-4. [Citation Graph (0, 0)][DBLP]
   DAC, 1998, pp:246-249 [Conf]
   
3. Susumu Narita, Fumio Arakawa, Kunio Uchiyama, Ikuya Kawasaki
   Design Methodology for GMICRO^TM/500 TRON Microprocessor. [Citation Graph (0, 0)][DBLP]
   ICCD, 1993, pp:253-257 [Conf]
   
4. Prasenjit Biswas, Atsushi Hasegawa, Srinivas Mandaville, Mark Debbage, Andy Sturges, Fumio Arakawa, Yasuhiko Saito, Kunio Uchiyama
   SH-5: The 64-Bit SuperH Architecture. [Citation Graph (0, 0)][DBLP]
   IEEE Micro, 2000, v:20, n:4, pp:28-39 [Journal]
   
5. Kunio Uchiyama, Pradip Bose
   Guest Editors' Introduction: Energy-Efficient Design. [Citation Graph (0, 0)][DBLP]
   IEEE Micro, 2005, v:25, n:5, pp:6-9 [Journal]
   
6. Keisuke Toyama, Satoshi Misaka, Kazuo Aisaka, Toshiyuki Aritsuka, Kunio Uchiyama, Koichiro Ishibashi, Hiroshi Kawaguchi, Takayasu Sakurai
   Frequency-voltage cooperative CPU power control: A design rule and its application by feedback prediction. [Citation Graph (0, 0)][DBLP]
   Systems and Computers in Japan, 2005, v:36, n:6, pp:39-48 [Journal]
   
7. Kunio Uchiyama
   Power-Efficient Heterogeneous Multicore Technology for Digital Convergence. [Citation Graph (0, 0)][DBLP]
   Asia-Pacific Computer Systems Architecture Conference, 2007, pp:2-3 [Conf]
   
8. 
   Software-cooperative power-efficient heterogeneous multi-core for media processing. [Citation Graph (, )][DBLP]