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T. Enomoto :
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T. Shimizu , T. Yoshida , Y. Saito , M. Matsuo , T. Enomoto A 32-bit Microprocessor Based on the TRON Architecture: Design of the GMICRO/100. [Citation Graph (0, 0)][DBLP ] COMPCON, 1988, pp:30-35 [Conf ] T. Enomoto , A. Kotabe A fast motion estimation algorithm and low-power 0.13-um CMOS motion estimation circuits. [Citation Graph (0, 0)][DBLP ] ISCAS (2), 2001, pp:449-452 [Conf ] T. Enomoto , Y. Sasajima , A. Hirobe , T. Ohsawa Fast motion estimation algorithm and low-power CMOS motion estimation array LSI for MPEG-2 encoding. [Citation Graph (0, 0)][DBLP ] ISCAS (4), 1999, pp:203-206 [Conf ] Takeshi Tokuda , Jiro Korematsu , Osamu Tomisawa , S. Asai , I. Ohkura , T. Enomoto A Hierarchical Standard Cell Approach for Custom VLSI Design. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1984, v:3, n:3, pp:172-177 [Journal ] Takeshi Tokuda , Kaoru Okazaki , K. Sakashita , I. Ohkura , T. Enomoto Delay-Time Modeling for ED MOS Logic LSI. [Citation Graph (0, 0)][DBLP ] IEEE Trans. on CAD of Integrated Circuits and Systems, 1983, v:2, n:3, pp:129-134 [Journal ] Search in 0.011secs, Finished in 0.012secs