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Publications of Author

1. Toshio Shimada, Kei Hiraki, Kenji Nishida
   An Architecture of a Data Flow Machine and Its Evaluation. [Citation Graph (0, 0)][DBLP]
   COMPCON, 1984, pp:486-490 [Conf]
   
2. Ryotaro Kobayashi, Yukihiro Ogawa, Hideki Ando, Toshio Shimada, Mitsuaki Iwata
   An On-Chip Multiprocessor Architecture with a Non-Blocking Synchronization Mechanism. [Citation Graph (0, 0)][DBLP]
   EUROMICRO, 1999, pp:1432-1440 [Conf]
   
3. Kei Hiraki, Kenji Nishida, Satoshi Sekiguchi, Toshio Shimada
   Maintenance Architecture and Its LSI Implementation of a Dataflow Computer with a Large Number of Processors. [Citation Graph (0, 0)][DBLP]
   ICPP, 1986, pp:584-591 [Conf]
   
4. Kei Hiraki, Toshio Shimada, Satoshi Sekiguchi
   Empirical Study of Latency Hiding on a Fine-Grain Parallel Processor. [Citation Graph (0, 0)][DBLP]
   International Conference on Supercomputing, 1993, pp:220-229 [Conf]
   
5. Satoshi Sekiguchi, Toshio Shimada, Kei Hiraki
   Sequential description and parallel execution language DFCII dataflow supercomputers. [Citation Graph (0, 0)][DBLP]
   ICS, 1991, pp:57-66 [Conf]
   
6. Toshitsugu Yuba, Toshio Shimada, Yoshinori Yamaguchi, Kei Hiraki, Shuichi Sakai
   Dataflow computer development in Japan. [Citation Graph (0, 0)][DBLP]
   ICS, 1990, pp:140-147 [Conf]
   
7. Kenji Toda, Kenji Nishida, Yoshinobu Uchibori, Shuichi Sakai, Toshio Shimada
   Parallel Multi-Context Architecture with High-Speed Synchronization Mechanism. [Citation Graph (0, 0)][DBLP]
   IPPS, 1991, pp:336-343 [Conf]
   
8. Toshio Shimada, Kei Hiraki, Kenji Nishida, Satoshi Sekiguchi
   Evaluation of a Prototype Data Flow Processor of the SIGMA-1 for Scientific Computations. [Citation Graph (0, 0)][DBLP]
   ISCA, 1986, pp:226-234 [Conf]
   
9. Ryo Fujioka, Kiyokazu Katayama, Ryotaro Kobayashi, Hideki Ando, Toshio Shimada
   A preactivating mechanism for a VT-CMOS cache using address prediction. [Citation Graph (0, 0)][DBLP]
   ISLPED, 2002, pp:247-250 [Conf]
   
10. Hajime Shimada, Hideki Ando, Toshio Shimada
    Pipeline stage unification: a low-energy consumption technique for future mobile processors. [Citation Graph (0, 0)][DBLP]
    ISLPED, 2003, pp:326-329 [Conf]
    
11. Kenji Nishida, Kenji Toda, Toshio Shimada, Yoshinori Yamaguchi
    The Hardware Architecture of the CODA Real-Time Parallel Processor. [Citation Graph (0, 0)][DBLP]
    PARCO, 1993, pp:395-402 [Conf]
    
12. Kei Hiraki, Satoshi Sekiguchi, Toshio Shimada
    Efficient vector processing on dataflow supercomputer SIGMA-1. [Citation Graph (0, 0)][DBLP]
    SC, 1988, pp:374-381 [Conf]
    
13. Toshitsugu Yuba, Yoshinori Yamaguchi, Toshio Shimada
    A Control Mechanism of a Lisp-Based Data-Driven Machine. [Citation Graph (0, 0)][DBLP]
    Inf. Process. Lett., 1983, v:16, n:3, pp:139-143 [Journal]
    
14. Toshio Shimada, Kenji Toda, Kenji Nishida
    Real-Time Parallel Architecture for Sensor Funsion. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1992, v:15, n:2, pp:143-152 [Journal]
    
15. Kei Hiraki, Kenji Nishida, Toshio Shimada
    Evaluation of Associative Memory Using Parallel Chained Hashing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1984, v:33, n:9, pp:851-855 [Journal]
    
16. 
    A priority forwarding scheme for real-time multistage interconnection networks. [Citation Graph (, )][DBLP]