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Raymond P. Voith: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Raymond P. Voith
    The PowerPC 603 C++ Verilog Interface Model. [Citation Graph (0, 0)][DBLP]
    COMPCON, 1994, pp:337-340 [Conf]
  2. Sankaran Karthik, Jacob A. Abraham, Raymond P. Voith
    Optimizations for Behavioral/RTL Simulation. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1993, pp:311-316 [Conf]
  3. Raymond P. Voith
    ULM Implicants for Minimization of Universal Logic Module Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1977, v:26, n:5, pp:417-424 [Journal]
  4. Raymond P. Voith
    Minimum Universal Logic Module Sequential Circuits with Decoders. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1977, v:26, n:10, pp:1032-1035 [Journal]

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