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James H. Aylor: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Sally A. McKee, Robert H. Klenke, Kenneth L. Wright, William A. Wulf, Maximo H. Salinas, James H. Aylor, Alan P. Baston
    Smarter Memory: Improving Bandwidth for Streamed References. [Citation Graph (1, 0)][DBLP]
    IEEE Computer, 1998, v:31, n:7, pp:54-63 [Journal]
  2. Ronald Waxman, James H. Aylor, Erich Marschner
    The VHSIC Hardware Description Language (IEEE Standard 1076): Language Features Revisited. [Citation Graph (0, 0)][DBLP]
    COMPCON, 1988, pp:310-315 [Conf]
  3. Robert H. Klenke, Moshe Meyassed, James H. Aylor, Barry W. Johnson, Ramesh Rao, Anup Ghosh
    An Integrated Design Environment for Performance and Dependability Analysis. [Citation Graph (0, 0)][DBLP]
    DAC, 1997, pp:184-189 [Conf]
  4. Robert M. McGraw, James H. Aylor, Robert H. Klenke
    A Top-Down Design Environment for Developing Pipelined Datapaths. [Citation Graph (0, 0)][DBLP]
    DAC, 1998, pp:236-241 [Conf]
  5. Sally A. McKee, Robert H. Klenke, Andrew J. Schwab, William A. Wulf, Steven A. Moyer, James H. Aylor, Charles Y. Hitchcock
    Experimental Implementation of Dynamic Access Ordering. [Citation Graph (0, 0)][DBLP]
    HICSS (1), 1994, pp:431-440 [Conf]
  6. Sung I. Hong, Sally A. McKee, Maximo H. Salinas, Robert H. Klenke, James H. Aylor, William A. Wulf
    Access Order and Effective Bandwidth for Streams on a Direct Rambus Memory. [Citation Graph (0, 0)][DBLP]
    HPCA, 1999, pp:80-89 [Conf]
  7. James H. Aylor, Raul Camposano, Michael A. Schuette, Wayne Wolf, Nam S. Woo
    The Future of Embedded System Design. [Citation Graph (0, 0)][DBLP]
    ICCD, 1992, pp:144-146 [Conf]
  8. Maximo H. Salinas, Barry W. Johnson, James H. Aylor
    Implementation-Independent Model of an Instruction Set Architecture Using VHDL. [Citation Graph (0, 0)][DBLP]
    ICCD, 1991, pp:140-145 [Conf]
  9. Robert M. McGraw, Moshe Meyassed, Robert H. Klenke, James H. Aylor, Ronald D. Williams
    Refinement of system-level designs using hybrid modeling. [Citation Graph (0, 0)][DBLP]
    ICECCS, 1995, pp:409-416 [Conf]
  10. Sanjay Srinivasan, James H. Aylor
    Digital Circuit Testing on a Network of Workstations. [Citation Graph (0, 0)][DBLP]
    ICPP (3), 1994, pp:115-118 [Conf]
  11. Sally A. McKee, Assaji Aluwihare, Benjamin H. Clark, Robert H. Klenke, Trevor C. Landon, Christopher W. Oliver, Maximo H. Salinas, Adam E. Szymkowiak, Kenneth L. Wright, William A. Wulf, James H. Aylor
    Design and Evaluation of Dynamic Access Ordering Hardware. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1996, pp:125-132 [Conf]
  12. Robert H. Klenke, Lori M. Kaufman, James H. Aylor, Ronald Waxman, Padmini Narayan
    Workstation Based Parallel Test Generation. [Citation Graph (0, 0)][DBLP]
    ITC, 1993, pp:419-428 [Conf]
  13. Jason J. Hein, James H. Aylor, Robert H. Klenke
    Performance-Based System Design Education. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:35-36 [Conf]
  14. Robert H. Klenke, James H. Aylor
    A Proposed Modeling Environment to Teach Performance Modeling and Hardware/Software Codesign to Senior Undergraduates. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:27-28 [Conf]
  15. Robert H. Klenke, James H. Aylor, Joseph M. Wolf
    An analysis of fault partitioning algorithms for fault partitioned ATPG. [Citation Graph (0, 0)][DBLP]
    VTS, 1996, pp:231-239 [Conf]
  16. James H. Aylor
    New Computer Departments Reflect our Changing Industry. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2000, v:33, n:3, pp:4-6 [Journal]
  17. James H. Aylor
    Can We Work Together? [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2001, v:34, n:1, pp:4- [Journal]
  18. James H. Aylor
    Keep on Keepin' on. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2001, v:34, n:8, pp:6-7 [Journal]
  19. James H. Aylor
    The End of Computing Disciplines as We Know Them? [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2002, v:35, n:1, pp:4-5 [Journal]
  20. James H. Aylor
    EIC's Message: It has been a Great Ride! [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2002, v:35, n:12, pp:12- [Journal]
  21. James H. Aylor
    Computer for the 21st Century. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1999, v:32, n:1, pp:4-6 [Journal]
  22. James H. Aylor, Roy L. Russo, Bruce Shriver
    The Promise of the Next Decade (Guest Editors' Introduction). [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1991, v:24, n:9, pp:15-16 [Journal]
  23. Doris L. Carver, Ronald G. Hoelzeman, James H. Aylor, Michael G. Hinchey
    Special Issue Introduction: The IEEE Computer Society's 60th Anniversary. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 2006, v:39, n:10, pp:22-25 [Journal]
  24. Robert H. Klenke, Ronald D. Williams, James H. Aylor
    Parallel-Processing Techniques for Automatic Test Pattern Generation. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1992, v:25, n:1, pp:71-84 [Journal]
  25. Sanjaya Kumar, James H. Aylor, Barry W. Johnson, William A. Wulf
    A Framework for Hardware / Software Codesign. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1993, v:26, n:12, pp:39-45 [Journal]
  26. Sanjaya Kumar, James H. Aylor, Barry W. Johnson, William A. Wulf
    Object-Oriented Techniques in Hardware Design. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1994, v:27, n:6, pp:64-70 [Journal]
  27. Maximo H. Salinas, Barry W. Johnson, James H. Aylor
    Implementation-Independent Model of an Instruction Set Architecture in VHDL. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1993, v:10, n:3, pp:42-54 [Journal]
  28. Murali K. Nethi, James H. Aylor
    Advances in Modelling and Simulation of Large Parallel/distributed Systems. [Citation Graph (0, 0)][DBLP]
    Parallel Processing Letters, 2005, v:15, n:4, pp:397-406 [Journal]
  29. Gang Han, Robert H. Klenke, James H. Aylor
    Performance Modeling of Hierarchical Crossbar-Based Multicomputer Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2001, v:50, n:9, pp:877-890 [Journal]
  30. Sally A. McKee, William A. Wulf, James H. Aylor, Robert H. Klenke, Maximo H. Salinas, Sung I. Hong, Dee A. B. Weikle
    Dynamic Access Ordering for Streamed Computations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2000, v:49, n:11, pp:1255-1271 [Journal]
  31. Moshe Meyassed, Robert H. Klenke, James H. Aylor
    Resolving unknown inputs in mixed-level simulation with sequential elements. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1999, v:18, n:8, pp:1151-1164 [Journal]
  32. Joseph M. Wolf, Lori M. Kaufman, Robert H. Klenke, James H. Aylor, Ronald Waxman
    An analysis of fault partitioned parallel test generation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1996, v:15, n:5, pp:517-534 [Journal]
  33. Yong Ma, James H. Aylor
    System Lifetime Optimization for Heterogeneous Sensor Networks with a Hub-Spoke Topology. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Mob. Comput., 2004, v:3, n:3, pp:286-294 [Journal]

  34. Body Area Sensor Networks: Challenges and Opportunities. [Citation Graph (, )][DBLP]


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