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C. S. Raghavendra: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. C. S. Raghavendra
    HMESH: A VLSI Architecture for Parallel Processing. [Citation Graph (0, 0)][DBLP]
    CONPAR, 1986, pp:76-83 [Conf]
  2. C. S. Raghavendra, Pei-Ji Yang, Sing-Ban Tien
    Free Dimensions - An Effective Approach to Achieving Fault Tolerance in Hypercubes. [Citation Graph (0, 0)][DBLP]
    FTCS, 1992, pp:170-177 [Conf]
  3. Tong-Yee Lee, C. S. Raghavendra, H. Sivaraman
    A Practical Scheduling Scheme for Non-Uniform Parallel Loops on Distributed Memory Parallel Machines. [Citation Graph (0, 0)][DBLP]
    HICSS (1), 1996, pp:243-250 [Conf]
  4. H. Sivaraman, C. S. Raghavendra
    ADDT: Automatic Data Distribution Tool for Porting Programs to PVM. [Citation Graph (0, 0)][DBLP]
    HICSS (1), 1996, pp:557-564 [Conf]
  5. Tong-Yee Lee, C. S. Raghavendra, John B. Nicholas
    A Fully Distributed Parallel Ray Tracing Scheme on the Delta Touchstone Machine. [Citation Graph (0, 0)][DBLP]
    HPDC, 1993, pp:129-134 [Conf]
  6. C. S. Raghavendra, J. A. Sylvester
    A Comparative Study of a Class of Double Loop Network Architectures. [Citation Graph (0, 0)][DBLP]
    ICC (1), 1984, pp:149-152 [Conf]
  7. Raja Venkateswaran, C. S. Raghavendra, Xiaoqiang Chen, Vijay P. Kumar
    A Scalable, Dynamic Multicast Routing Algorithm in ATM Networks. [Citation Graph (0, 0)][DBLP]
    ICC (3), 1997, pp:1361-1365 [Conf]
  8. Raja Venkateswaran, Xiaoqiang Chen, Shizhao Li, C. S. Raghavendra, Nirwan Ansari
    Improved VC-Merging for Multiway Communications in ATM Networks. [Citation Graph (0, 0)][DBLP]
    ICCCN, 1998, pp:4-11 [Conf]
  9. Jean-Luc Gaudiot, C. S. Raghavendra
    Fault-Tolerance and Data-Flow Systems. [Citation Graph (0, 0)][DBLP]
    ICDCS, 1985, pp:16-23 [Conf]
  10. Hwa-Chun Lin, C. S. Raghavendra
    An Analysis of the Join the Shortest Queue (JSQ) Policy. [Citation Graph (0, 0)][DBLP]
    ICDCS, 1992, pp:362-366 [Conf]
  11. Hwa-Chun Lin, C. S. Raghavendra
    A State-Aggregation Method for Analyzing Dynamic Load-Balancing Policies. [Citation Graph (0, 0)][DBLP]
    ICDCS, 1993, pp:482-489 [Conf]
  12. C. S. Raghavendra, Douglas Stott Parker Jr.
    Reliability Analysis of an Interconnection Network. [Citation Graph (0, 0)][DBLP]
    ICDCS, 1984, pp:461-471 [Conf]
  13. Anujan Varma, C. S. Raghavendra
    Fault-Tolerant Routing of Permutations in Extra-Stage Networks. [Citation Graph (0, 0)][DBLP]
    ICDCS, 1986, pp:54-61 [Conf]
  14. Meera Balakrishnan, Rajiv Jain, C. S. Raghavendra
    On Array Storage for Conflict-Free Memory Access for Parallel Processors. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1988, pp:103-107 [Conf]
  15. Rajendra V. Boppana, C. S. Raghavendra
    On Self Routing in Benes and Shuffle Exchange Networks. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1988, pp:196-200 [Conf]
  16. Rajendra V. Boppana, C. S. Raghavendra
    Efficient Storage Schemes for Arbitrary Size Square Matrices in Parallel Processors with Shuffle-Exchange Networks. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1991, pp:365-368 [Conf]
  17. Tong-Yee Lee, C. S. Raghavendra, John B. Nicholas
    Experimental Evaluation of Load Balancing Strategies for Ray Tracing on Parallel Processors. [Citation Graph (0, 0)][DBLP]
    ICPP, 1994, pp:264-267 [Conf]
  18. Tong-Yee Lee, C. S. Raghavendra, John B. Nicholas
    AN Efficient Sort-Last Polygon Rendering Scheme on 2-D Mesh Parallel Computers. [Citation Graph (0, 0)][DBLP]
    ICPP (3), 1995, pp:9-16 [Conf]
  19. C. S. Raghavendra, Rajendra V. Boppana
    On Methods for Fast and Efficient Parallel Memory Access. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1990, pp:76-83 [Conf]
  20. C. S. Raghavendra, M. A. Sridhar
    Optimal Routing of Bit-Permutes on Hypercube Machines. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1990, pp:286-290 [Conf]
  21. C. S. Raghavendra, M. A. Sridhar, S. Harikumar
    Prefix Computation On a Faulty Hypercube. [Citation Graph (0, 0)][DBLP]
    ICPP, 1993, pp:280-283 [Conf]
  22. Alexander A. Sawchuk, Bob K. Jenkins, C. S. Raghavendra, Anujan Varma
    Optical Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    ICPP, 1985, pp:388-392 [Conf]
  23. Alexander A. Sawchuk, Bob K. Jenkins, Anujan Varma, C. S. Raghavendra
    Optical Matrix-Vector Implementation of Crossbar Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    ICPP, 1986, pp:401-404 [Conf]
  24. M. A. Sridhar, C. S. Raghavendra
    Uniform Minimal Full-Access Networks. [Citation Graph (0, 0)][DBLP]
    ICPP, 1987, pp:401-406 [Conf]
  25. Sing-Ban Tien, C. S. Raghavendra
    Simulation of SIMD Algorithms on Faulty Hypercubes. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1991, pp:716-717 [Conf]
  26. Anujan Varma, C. S. Raghavendra
    Realization of Permutations on Generalized Indra Networks. [Citation Graph (0, 0)][DBLP]
    ICPP, 1985, pp:328-333 [Conf]
  27. Anujan Varma, C. S. Raghavendra
    Performance Analysis of a Redundant-Path Interconnection Network. [Citation Graph (0, 0)][DBLP]
    ICPP, 1985, pp:474-479 [Conf]
  28. Anujan Varma, C. S. Raghavendra
    Rearrangeability of the 5-Stage Shuffle/Exchange Network for N=8 9. [Citation Graph (0, 0)][DBLP]
    ICPP, 1986, pp:11-122 [Conf]
  29. Pei-Ji Yang, Sing-Ban Tien, C. S. Raghavendra
    Embedding of Multidimensional Meshes on to Faulty Hypercubes. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1991, pp:571-574 [Conf]
  30. Ge-Ming Chiu, C. S. Raghavendra
    A Model for Optimal Database Allocation in Distributed Computing Systems. [Citation Graph (0, 0)][DBLP]
    INFOCOM, 1990, pp:827-833 [Conf]
  31. Ge-Ming Chiu, C. S. Raghavendra, Shu Ming Ng
    Resource Allocation with Load Balancing Consideration in Distributed Computing Systems. [Citation Graph (0, 0)][DBLP]
    INFOCOM, 1989, pp:758-765 [Conf]
  32. Hwa-Chun Lin, Ge-Ming Chiu, C. S. Raghavendra
    Performance Study of Dynamic Load Balancing Policies for Distributed Systems with Service Interruptions. [Citation Graph (0, 0)][DBLP]
    INFOCOM, 1991, pp:797-805 [Conf]
  33. John A. Silvester, C. S. Raghavendra
    Analysis and Simulation of a Class of double Loop Network Architectures. [Citation Graph (0, 0)][DBLP]
    INFOCOM, 1984, pp:30-35 [Conf]
  34. Kichul Kim, C. S. Raghavendra
    A Simple Algorithm to Route Arbitrary Permuations on 8-Input 5-Stage Shuffle/Exchange Network. [Citation Graph (0, 0)][DBLP]
    IPPS, 1991, pp:398-403 [Conf]
  35. Tong-Yee Lee, C. S. Raghavendra, John B. Nicholas
    Parallel implementation of ray-tracing algorithm on the Intel Delta parallel computer. [Citation Graph (0, 0)][DBLP]
    IPPS, 1995, pp:688-692 [Conf]
  36. C. S. Raghavendra, Suresh Chalasani, Rajendra V. Boppana
    Improved Algorithms for Load Balancing in Circuit-Switched Hypercubes. [Citation Graph (0, 0)][DBLP]
    IPPS, 1991, pp:537-542 [Conf]
  37. C. S. Raghavendra, M. A. Sridhar
    Global Semigroup Operations in Faulty SIMD Hypercubes. [Citation Graph (0, 0)][DBLP]
    IPPS, 1993, pp:706-711 [Conf]
  38. Amit Sengupta, C. S. Raghavendra
    Total Exchange in Faulty SIMD Hypercubes. [Citation Graph (0, 0)][DBLP]
    IPPS, 1994, pp:853-857 [Conf]
  39. Amit Sengupta, C. S. Raghavendra
    On Some Global Operations in Faulty SIMD Hypercubes. [Citation Graph (0, 0)][DBLP]
    IPPS, 1996, pp:579-583 [Conf]
  40. Pei-Ji Yang, C. S. Raghavendra
    Embedding and Reconfiguration of Binary Trees in Faulty Hypercubes. [Citation Graph (0, 0)][DBLP]
    IPPS, 1992, pp:2-9 [Conf]
  41. Pei-Ji Yang, C. S. Raghavendra
    Reconfiguration of Binary Trees in Faulty Hypercubes. [Citation Graph (0, 0)][DBLP]
    IPPS, 1993, pp:401-405 [Conf]
  42. D. S. Parker, C. S. Raghavendra
    The Gamma network: A multiprocessor interconnection network with redundant paths. [Citation Graph (0, 0)][DBLP]
    ISCA, 1982, pp:73-80 [Conf]
  43. Anujan Varma, C. S. Raghavendra
    Rearrangeability of Multistage Shuffle/Exchange Networks. [Citation Graph (0, 0)][DBLP]
    ISCA, 1987, pp:154-162 [Conf]
  44. Dejan Markovic, Jack R. Hagemeister, C. S. Raghavendra, Sanjay Bhansali
    Semi-automatic Generation of Parallelizable Patterns from Source Code Examples. [Citation Graph (0, 0)][DBLP]
    WPC, 1997, pp:50-59 [Conf]
  45. Suresh Singh, Mike Woo, C. S. Raghavendra
    Power-Aware Routing in Mobile Ad Hoc Networks. [Citation Graph (0, 0)][DBLP]
    MOBICOM, 1998, pp:181-190 [Conf]
  46. Suresh Chalasani, Anujan Varma, C. S. Raghavendra
    Fault-tolerant routing in MIN-based supercomputers. [Citation Graph (0, 0)][DBLP]
    SC, 1990, pp:244-253 [Conf]
  47. C. S. Raghavendra, M. A. Sridhar
    Broadcasting Algorithms in Faulty SIMD Hypercubes. [Citation Graph (0, 0)][DBLP]
    SPDP, 1992, pp:4-11 [Conf]
  48. C. S. Raghavendra, M. A. Sridhar
    Exact Solutions to Diameter and Routing Problems in PEC Networks. [Citation Graph (0, 0)][DBLP]
    SPDP, 1993, pp:574-581 [Conf]
  49. M. A. Sridhar, C. S. Raghavendra
    On finding maximal subcubes in residual hypercubes. [Citation Graph (0, 0)][DBLP]
    SPDP, 1990, pp:870-873 [Conf]
  50. Guangzhi Qu, Jayprakash Rudraraju, R. Modukuri, Salim Hariri, C. S. Raghavendra
    A Framework for Network Vulnerability Analysis. [Citation Graph (0, 0)][DBLP]
    Communications, Internet, and Information Technology, 2002, pp:289-294 [Conf]
  51. C. S. Raghavendra
    Editorial. [Citation Graph (0, 0)][DBLP]
    Cluster Computing, 1998, v:1, n:2, pp:147-148 [Journal]
  52. C. S. Raghavendra, John A. Silvester
    A Survey of Multi-Connected Loop Topologies for Local Computer Networks. [Citation Graph (0, 0)][DBLP]
    Computer Networks, 1986, v:11, n:, pp:29-42 [Journal]
  53. Tong-Yee Lee, C. S. Raghavendra, John B. Nicholas
    Parallel Omplementation of a Ray Tracing Algorithm for Distributed Memory Parallel Computers. [Citation Graph (0, 0)][DBLP]
    Concurrency - Practice and Experience, 1997, v:9, n:10, pp:947-965 [Journal]
  54. Hwa-Chun Lin, C. S. Raghavendra
    Approximating the mean response time of parallel queues with JSQ policy. [Citation Graph (0, 0)][DBLP]
    Computers & OR, 1996, v:23, n:8, pp:733-740 [Journal]
  55. Anujan Varma, C. S. Raghavendra
    Realization of permutations on generalized INDRA networks. [Citation Graph (0, 0)][DBLP]
    Inf. Sci., 1988, v:44, n:1, pp:51-69 [Journal]
  56. Rajendra V. Boppana, C. S. Raghavendra
    Generalized Schemes for Access and Alignment of Data in Parallel Processors with Self-Routing Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1991, v:11, n:2, pp:97-111 [Journal]
  57. Rajendra V. Boppana, C. S. Raghavendra
    On Methods to Align and Access Data Arrays in Parallel Computers. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1995, v:26, n:2, pp:261-269 [Journal]
  58. Suresh Chalasani, C. S. Raghavendra, Anujan Varma
    Fault-Tolerant Routing in MIN-Based Supercomputers. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1994, v:22, n:2, pp:154-167 [Journal]
  59. Ge-Ming Chiu, Suresh Chalasani, C. S. Raghavendra
    Flexible Routing Criteria for Circuit-Switched Hypercubes. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1994, v:22, n:2, pp:279-294 [Journal]
  60. C. S. Raghavendra, M. A. Sridhar
    Routing Permutations on Hypercube Machines with Half-Duplex Links. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1994, v:20, n:1, pp:14-19 [Journal]
  61. C. S. Raghavendra, M. A. Sridhar
    Exact Solutions to Diameter and Routing Problems in PEC Networks. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1996, v:34, n:2, pp:202-210 [Journal]
  62. C. S. Raghavendra, M. A. Sridhar
    Dimension Ordering and Broadcast Algorithms in Faulty SIMD Hypercubes. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1996, v:35, n:1, pp:57-66 [Journal]
  63. M. A. Sridhar, C. S. Raghavendra
    Uniform Minimal Full-Access Networks. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1988, v:5, n:4, pp:383-403 [Journal]
  64. M. A. Sridhar, C. S. Raghavendra
    Minimal Full-Access Networks: Enumeration and Characterization. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1990, v:9, n:4, pp:347-356 [Journal]
  65. M. A. Sridhar, C. S. Raghavendra
    Computing Large Subcubes in Residual Hypercubes. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1995, v:24, n:2, pp:213-217 [Journal]
  66. Anujan Varma, C. S. Raghavendra
    On Permutations Passable by the Gamma Network. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1986, v:3, n:1, pp:72-91 [Journal]
  67. Pei-Ji Yang, Sing-Ban Tien, C. S. Raghavendra
    Reconfiguration of Rings and Meshes in Faulty Hypercubes. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1994, v:22, n:1, pp:96-106 [Journal]
  68. Meera Balakrishnan, C. S. Raghavendra
    On Reliability Modeling of Closed Fault-Tolerant Computer Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1990, v:39, n:4, pp:571-575 [Journal]
  69. Meera Balakrishnan, C. S. Raghavendra
    An Analysis of a Reliability Model for Repairable Fault-Tolerant Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1993, v:42, n:3, pp:327-339 [Journal]
  70. José A. B. Fortes, C. S. Raghavendra
    Gracefully Degradable Processor Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1985, v:34, n:11, pp:1033-1044 [Journal]
  71. A. Majumdar, C. S. Raghavendra, Melvin A. Breuer
    Fault Tolerance in Linear Systolic Arrays Using Time Redundancy. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1990, v:39, n:2, pp:269-276 [Journal]
  72. Douglas Stott Parker Jr., C. S. Raghavendra
    The Gamma Network. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1984, v:33, n:4, pp:367-373 [Journal]
  73. C. S. Raghavendra, Rajendra V. Boppana
    On Self-Routing in Benes and Shuffle-Exchange Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1991, v:40, n:9, pp:1057-1064 [Journal]
  74. C. S. Raghavendra, M. A. Sridhar
    Global Commutative and Associative Reduction Operations in Faulty SIMD Hypercubes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:4, pp:495-498 [Journal]
  75. C. S. Raghavendra, Anujan Varma
    Fault-Tolerant Multiprocessors with Redundant-Path Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1986, v:35, n:4, pp:307-316 [Journal]
  76. C. S. Raghavendra, Pei-Ji Yang, Sing-Ban Tien
    Free Dimensions-An Effective Approach to Achieving Fault Tolerance in Hypercubes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1995, v:44, n:9, pp:1152-1157 [Journal]
  77. M. A. Sridhar, C. S. Raghavendra
    Fault-Tolerant Networks Based on the de Bruijn Graph. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1991, v:40, n:10, pp:1167-1174 [Journal]
  78. Anujan Varma, C. S. Raghavendra
    Fault-Tolerant Routing in Multistage Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1989, v:38, n:3, pp:385-393 [Journal]
  79. Pei-Ji Yang, Sing-Ban Tien, C. S. Raghavendra
    Embedding of Rings and Meshes onto Faulty Hypercubes Using Free Dimensions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:5, pp:608-613 [Journal]
  80. C. S. Raghavendra, M. A. Sridhar
    Improved algorithms for computing with faulty SIMD hypercubes. [Citation Graph (0, 0)][DBLP]
    Telecommunication Systems, 1998, v:10, n:1, pp:149-156 [Journal]
  81. Rajendra V. Boppana, Suresh Chalasani, C. S. Raghavendra
    Resource Deadlocks and Performance of Wormhole Multicast Routing Algorithms. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1998, v:9, n:6, pp:535-549 [Journal]
  82. Hwa-Chun Lin, C. S. Raghavendra
    An Approximate Analysis of the Join the Shortest Queue (JSQ) Policy. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1996, v:7, n:3, pp:301-307 [Journal]
  83. Amit Sengupta, C. S. Raghavendra
    All-To-All Broadcast and Matrix Multiplication in Faulty SIMD Hypercubes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1998, v:9, n:6, pp:550-560 [Journal]
  84. Sing-Ban Tien, C. S. Raghavendra
    Algorithms and Bounds for Shortest Paths and Diameter in Faulty Hypercubes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1993, v:4, n:6, pp:713-718 [Journal]
  85. Pei-Ji Yang, C. S. Raghavendra
    Embedding and Reconfiguration of Binary Trees in Faulty Hypercubes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1996, v:7, n:3, pp:237-245 [Journal]
  86. Hwa-Chun Lin, C. S. Raghavendra
    A Dynamic Load-Balancing Policy With a Central Job Dispatcher (LBC). [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Software Eng., 1992, v:18, n:2, pp:148-158 [Journal]
  87. Tong-Yee Lee, C. S. Raghavendra, John B. Nicholas
    Image Composition Schemes for Sort-Last Polygon Rendering on 2D Mesh Multicomputers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Vis. Comput. Graph., 1996, v:2, n:3, pp:202-217 [Journal]

  88. PAMAS - power aware multi-access protocol with signalling for ad hoc networks. [Citation Graph (, )][DBLP]


  89. Editorial. [Citation Graph (, )][DBLP]


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